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Volumn , Issue , 2005, Pages 251-254

A device-controlled dynamic configuration framework supporting heterogeneous resource management

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMMING; AUTONOMOUS RECONFIGURATIONS; CONTROLLED DYNAMICS; DYNAMIC RECONFIGURATIONS; FIELD-PROGRAMMABLE GATE ARRAYS; FPGA FABRICS; HARDWARE CONFIGURATIONS; HETEROGENEOUS RESOURCES; LOW OVERHEADS; MICROPROCESSOR CORES; MULTI LAYERS; ON CHIPS; PARTIAL RECONFIGURATIONS; POWERPC; RUN-TIME; RUN-TIME RECONFIGURATIONS;

EID: 42649132790     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (7)
  • 1
    • 0005703841 scopus 로고    scopus 로고
    • A Reconfigurable Computing Primer
    • Sep
    • Michael Barr, "A Reconfigurable Computing Primer", Multimedia Systems Design, pp. 44-47, Sep. 1998.
    • (1998) Multimedia Systems Design , pp. 44-47
    • Barr, M.1
  • 6
    • 2642563707 scopus 로고    scopus 로고
    • Virtex-II Pro Platform FPGA User Guide
    • Xilinx, Inc, v2.4, Aug
    • Xilinx, Inc. "Virtex-II Pro Platform FPGA User Guide", v2.4, Aug. 2004.
    • (2004)
  • 7
    • 60749089625 scopus 로고    scopus 로고
    • Xilinx, Inc. Two Flows for Partial Reconfiguration: Module Based or Difference Based, v 1.1, Nov 2003.
    • Xilinx, Inc. "Two Flows for Partial Reconfiguration: Module Based or Difference Based", v 1.1, Nov 2003.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.