Through-wafer copper electroplating for RF silicon technology

European Solid-State Device Research Conference

Volumn , Issue , 2002, Pages 255-258

  Nguyen, N T ^a,b   Ng, K T ^a   Boellaard, E ^a   Pham, N P ^a   Craciun, G ^a   Sarro, P M ^a   Burghartz, J N ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

^b HANOI UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Viet Nam)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; COPPER; ELECTROPLATING; SILICON;

COPPER ELECTROPLATING; COPPER METALLIZATION; ELECTRICAL CHARACTERIZATION; FABRICATION PROCESS; SILICON INTEGRATION; SILICON MICROMACHINING; SILICON TECHNOLOGIES; THREE DIMENSIONAL (3D) STRUCTURES;

SILICON WAFERS;

EID: 42549159116     PISSN: 19308876     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSDERC.2002.194918     Document Type: Conference Paper

References (3)

1. J.N. Burghartz, "Status and Trends of Silicon RF Technology", Microelectronics-Reliability, vol.41 (1), 2001, pp. 13-19
2. N.P. Pham et al., "IC-compatible Two-level bulk micromachining process module for RF silicon technology", IEEE Transactions on Electron Devices, vol. 48 (8) August 2001, pp. 1756-1764
3. G.Craciun, et al, "Aspect ratio and crystallographic orientation dependence in deep dry silicon etching at cryogenic temperatures", Techn. Digest TRANSDUCERS 2001, June 2001, Germany, pp. 612-616.