A low power V-band CMOS frequency divider with wide locking range and accurate quadrature output phases

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 4, 2008, Pages 991-997

  Gu, Qun ^b   Xu, Zhiwei ^c   Huang, Daquan ^b   LaRocca, Tim ^b   Wang, Ning Yi ^b   Hant, William ^b   Chang, Mau Chung Frank ^a,b  

^a IEEE

^b UNIVERSITY OF CALIFORNIA   (United States)

^c SST Communications Inc   (United States)

Author keywords

Accurate quadrature phase; Injection locked frequency divider; Low power consumption; Phase noise; RF CMOS; Wide locking range

Indexed keywords

ENERGY DISSIPATION; FREQUENCY DIVIDING CIRCUITS; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; TOPOLOGY;

ACCURATE QUADRATURE PHASE; CIRCUIT MISMATCHES;

CMOS INTEGRATED CIRCUITS;

EID: 41549107144     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.917517     Document Type: Conference Paper

References (13)

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