The promise of high-performance reconfigurable computing

Computer

Volumn 41, Issue 2, 2008, Pages 69-76

  El Ghazawi, Tarek ^a   El Araby, Esam ^a   Huang, Miaoqing ^a   Gaj, Kris ^b   Kindratenko, Volodymyr ^c   Buell, Duncan ^d  

^a The George Washington University   (United States)

^b Krasnow Institute for Advanced Study   (United States)

^c UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^d The Department of Mechanical Engineering   (United States)

Author keywords

Field programmable gate arrays; High performance computing; HPRC systems; Reconfigurable computing

Indexed keywords

EID: 40949098178     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/MC.2008.65     Document Type: Article

References (10)

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8. O.D. Fidanci et al., "Implementation Trade-Offs of Triple DES in the SRC-6E Reconfigurable Computing Environment," Proc. 5th Ann. Int'l Conf. Military and Aerospace Programmable Logic Devices, 2002; www.gwu.edu/-hpc/rcm/publications/MAPLD2002.pdf.
9. R.L. Rivest, "The RC5 Encryption Algorithm," revised version, MIT Laboratory for Computer Science, Cambridge, Mass., 20 Mar. 1997; http://people.csail.mit.edu/rivest/Rivest-rc5rev.pdf.
10. A. Michalski, K. Gaj, and T. El-Ghazawi, "An Implementation Comparison of an IDEA Encryption Cryptosystem on Two General-Purpose Reconfigurable Computers," Proc. 13th Ann. Conf. Field-Programmable Logic and Applications, LNCS 2778, Springer, 2003, pp. 204-219.