Low complexity bit-parallel multiplier for a class of finite fields

2006 International Conference on Communications, Circuits and Systems, ICCCAS, Proceedings

Volumn 4, Issue , 2006, Pages 2565-2568

  Wu, Huapeng ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; COMPUTATIONAL COMPLEXITY; POLYNOMIAL APPROXIMATION; TIME DELAY;

FINITE FIELDS; LOW-COMPLEXITY BIT-PARALLEL FINITE FIELD MULTIPLIERS;

MULTIPLYING CIRCUITS;

EID: 39749167758     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCCAS.2006.285197     Document Type: Conference Paper

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