An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Marutani, Masazumi ^a   Anbutsu, Hideaki ^a   Kondo, Masafumi ^a   Shirai, Noriaki ^a   Yamazaki, Hiroshi ^a   Watanabe, Yuu ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL DEVICES; OPTIMIZATION; PHASE NOISE; TELEVISION RECEIVERS; TUNERS;

AUTO-TUNING BLOCK; CMOS PROCESS; WIDE TUNING RANGE;

TUNING;

EID: 39749096822     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. T. Nagai et al., "1.2V 3.5mW ΔΣ Modulator with a Passive Current Summing Network and a Variable Gain Function," ISSCC Dig. Tech. Papers, pp.494-495, Feb., 2005
2. D. Saias et al., "A 0.12μm DVB-T Tuner," ISSCC Dig. Tech. Papers, pp.430-431, Feb. 2005
3. H. van Rumpt et al., "UMTV: a Single Chip TV Receiver for PDAs, PCs, and Cell Phones," ISSCC Dig. Tech. Papers, pp.428-429, Feb., 2005
4. R. B. Staszewski et al., "All-Digital TX Frequency Synthesizer and Discrete-Time Receiver for Bluetooth Radio in 130-nm CMOS," IEEE J. Solid-State Circuits, vol 39, no 12, pp.2278-2291, Dec., 2004.