Ultra-flexible, layout-enabled field plates for HV transistor integration in SOI-based CMOS

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Volumn , Issue , 2007, Pages 77-80

  Sonsky J ^a   Heringa, A ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; MOSFET DEVICES; SILICON ON INSULATOR TECHNOLOGY; SWITCHING CIRCUITS;

DEVICE OPTIMIZATION; HIGH FREQUENCY POWER SWITCHING;

TRANSISTORS;

EID: 39049124648     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPSD.2007.4294936     Document Type: Conference Paper

References (4)

1. P. Wessels, M. Swanenberg, J. Claes, E.R. Ooms, "Advanced 100V, 0.13 μn BCD process for next generation automotive applications," ISPSD conference proceeding, 2006, pp. 197-200.
2. C. Contiero, B. Murari, B. Vigna, "Progress in Power ICs and MEMS, "Analog" Technologies to interface the Real World," ISPSD conference proceeding, 2004, pp. 3-12.
3. M Kanechika, M. Kodama, T. Uesugi, H. Tadano, "A concept of SOI RESURP lateral devices with striped trench electrodes," IEEE Trans. Elec. Dev. 52(6), 2005, pp.1205-1210.
4. S. Merchant, "Analytical model for the electric field distribution in SOI RESURF and TMBS structures," IEEE Trans. Elec. Dev. 46(6), 1999, pp. 1264-1267.