Towards the system-on-chip realization of a sensorless vector controller with microsecond-order computation time

Canadian Conference on Electrical and Computer Engineering

Volumn , Issue , 2006, Pages 1073-1077

  Beguenane, Rachid ^a   Mailloux, Jean Gabriel ^a   Simard, Stéphane ^a   Tisserand, Arnaud ^b  

^a UNIVERSITÉ DU QUÉBEC À CHICOUTIMI   (Canada)

^b CNRS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); MICROPROCESSOR CHIPS; VECTOR QUANTIZATION;

IMPLEMENTATION COSTS; MICROSECOND-ORDER COMPUTATION TIME; SENSORLESS VECTOR CONTROL ALGORITHMS; SYSTEM-ON-CHIP;

ALGORITHMS;

EID: 39049110757     PISSN: 08407789     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CCECE.2006.277332     Document Type: Conference Paper

References (4)

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2. R. Galli and A. Tenca, "A Design Methodology for Networks of Online Modules and Its Application to the Levinson-Durbin Algorithm," IEEE Trans. on VLSI. Vol. 12, No. 1, Jan. 2004.
3. B.R. Lee and N. Burgess, "Improved Small Multiplier Based Multiplication, Squaring and Division," Proc. 11th Annual Symposium on Field-Programmable Custom Computing Machines (FCCM'03), 2003.
4. J.-L. Beuchat and A. Tisserand, "Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices," FPL 2002, LNCS 2438, pp. 513-522, 2002.