A low-power high-SFDR CMOS direct digital frequency synthesizer

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2005, Pages 1670-1673

  Wang, Jinn Shyan ^a   Lin, Shiang Jiun ^a   Yeh, Chingwei ^a  

^a Chung Cheng University   (China)

Author keywords

[No Author keywords available]

Indexed keywords

CELL-BASED; DESIGN TECHNIQUE; DIRECT DIGITAL FREQUENCY SYNTHESIZER; LOOK UP TABLE; LOW POWER; PARAMETERS SELECTION; POWER EFFICIENCY; POWER EFFICIENT; POWER-AWARE; SUPPLY VOLTAGES; SUPPLY-VOLTAGE SCALING;

FREQUENCY SYNTHESIZERS;

TABLE LOOKUP;

EID: 39049102571     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1464926     Document Type: Conference Paper

References (7)

1. A. Madisetti, et al., "A 100M-Hz, 16-b, Direct Digital Frequency Synthesizer with a 100dBc Spurious-Free Dynamic Range," IEEE J. Solid-State Circuits, vol. 34, pp. 1034-1043, Aug. 1999.
2. A. Bellaouar, et al., "Low-power direct digital frequency synthesis for wireless communications," IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 385-390, Mar. 2000.
3. Yongchul Song, et al., "A 16b Quadrature Direct Digital Frequency Synthesizer Using Interpolative Angle Rotation Algorithm," in Proceeding of 2002 IEEE Symposium on VLSI Circuits, pp. 146-147, 2002.
4. S. Mortezapour, et al., "Design of low-power ROM-less direct digital frequency synthesizer using nonlinear digital-to-analog converter," IEEE J. Solid-State Circuits, vol. 34, no. 10, pp. 1350-1359, Oct. 1999.
5. Ahmed Nader Mohieldin, et al., "A 100-MHz 8-mW ROMless quadrature direct digital frequency synthesizer", IEEE J. Solid-State Circuits, vol. 37, no. 10, pp. 1235-1243, Oct. 2002.
6. B. Goldberg, Digital Techniques in Frequency Synthesis. New York: McGraw-Hill, 1996.
7. J. M. Jou, "Design of low-error fixed-width multipliers for DSP applications," IEEE Trans. on Circuits and Systems, vol. 46, pp. 836-842, Jun. 1999.