Manufacturing concerns for advanced CMOS circuit realization EBDW alternative solution for cost and cycle time reductions

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5374, Issue PART 2, 2004, Pages 590-600

  Pain, L ^a   Jurdit, M ^a   Laplanche, Y ^b   Todeschini, J ^c   Manakli, S ^b   Bervin, G ^d   Palla, R ^b   Beverina, A ^b   Faure, R ^b   Bossy, X ^b   Leininger, H ^b   Tourniol, S ^b   Broekaart, M ^c   Judong, F ^b   Brosselin, K ^b   Gouraud, P ^b   De Jonghe, V ^c   Henry, D ^b   Woo, M ^d   Stolk, P ^c   Tavel, B ^c   Arnaud, F ^b   more..

^a CEA GRENOBLE   (France)

^b STMICROELECTRONICS   (France)

^c NXP SEMICONDUCTORS   (Netherlands)

^d MOTOROLA INC   (United States)

Author keywords

E beam; Lithography; Photoresist; SRAM

Indexed keywords

CMOS INTEGRATED CIRCUITS; COST EFFECTIVENESS; ELECTRON BEAMS; MASKS; MICROPROCESSOR CHIPS; OPTICAL DESIGN; PHOTOLITHOGRAPHY; PHOTORESISTS; PRODUCT DEVELOPMENT; RESEARCH AND DEVELOPMENT MANAGEMENT; STATIC RANDOM ACCESS STORAGE;

CELL REALIZATION; ELECTRON BEAM DIRECT WRITE (EBDW); OPTICAL PROCESSES;

ELECTRON BEAM LITHOGRAPHY;

EID: 3843137189     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.537188     Document Type: Conference Paper

References (5)

1. D. Pramanaki et al: Proc. SPIE, 5043, (2003), 142
2. L. Pain et al, MNC conference (2003), to be published in JJAP
3. F. Arnaud et al, symposium on VLSI technol., (2003), 65
4. S. Magoshi etal: Proc. SPIE, 5037, (2003), 1035
5. F. Arnaud et al, symposium on VLSI technol. ; paper accepted for 2004 conference