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Volumn 34, Issue 10, 2007, Pages 1422-1426

High-accuracy time-interval-unit for spaceborne laser range finder

Author keywords

Digital delay line interpolation; Field programmable gate array; Measurement; Spaceborne laser range finder; Time interval unit

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERPOLATION; LASER PULSES;

EID: 36248982755     PISSN: 02587025     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (13)

References (12)
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  • 2
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    • Acam-messelectronic gmbh. TDC-GP1 Functional Description [EB/OL]. http://www.acem-usa.com/Documents/English/DB_GP1_e.pdf, 2005-5-12.
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  • 3
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    • HPTDC high performance time to digital converter
    • J. Christiansen. HPTDC High Performance Time to Digital Converter [EB/OL]. www.star.bnl.gov/STAR/tof/electronics/hptdc_manual_ver2.2.pdf, 2004-3.
    • (2004)
    • Christiansen, J.1
  • 4
    • 33645282758 scopus 로고    scopus 로고
    • Review on time-of-flight measurement of pulsed laser radar
    • Huo Yujin, Chen Qiansong, Pan Zhiwen. Review on time-of-flight measurement of pulsed laser radar [J]. Laser and Infrared, 2001, 31(3): 136-139.
    • (2001) Laser and Infrared , vol.31 , Issue.3 , pp. 136-139
    • Huo, Y.1    Chen, Q.2    Pan, Z.3
  • 5
    • 34447638569 scopus 로고    scopus 로고
    • High-precision time-interval measurement techniques and methods
    • Zhang Yan, Huang Peicheng. High-precision time-interval measurement techniques and methods [J]. Progress in Astronomy, 2006, 24(1): 1-15.
    • (2006) Progress in Astronomy , vol.24 , Issue.1 , pp. 1-15
    • Zhang, Y.1    Huang, P.2
  • 6
    • 0031078640 scopus 로고    scopus 로고
    • Field-programmable-gate-array-based time-to-digital converter with 200 ps resolution
    • Jozef Kalisz, Ryszard Szplet, Jerzy Pasierbinski et al.. Field-programmable-gate-array-based time-to-digital converter with 200 ps resolution [J]. IEEE Trans. Instrum. Measur., 1997, 46(1): 51-55.
    • (1997) IEEE Trans. Instrum. Measur. , vol.46 , Issue.1 , pp. 51-55
    • Kalisz, J.1    Szplet, R.2    Pasierbinski, J.3
  • 7
    • 0031199777 scopus 로고    scopus 로고
    • Single-chiped interpolating time counter with 200 ps resolution and 43 s range
    • Jozef Kalisz, Ryszard Szplet, Ryszard Pelka et al.. Single-chiped interpolating time counter with 200 ps resolution and 43 s range [J]. IEEE Trans. Instrum. Measur., 1997, 46(4): 851-856.
    • (1997) IEEE Trans. Instrum. Measur. , vol.46 , Issue.4 , pp. 851-856
    • Kalisz, J.1    Szplet, R.2    Pelka, R.3
  • 8
    • 0034250069 scopus 로고    scopus 로고
    • Interpolating time counter with 100 ps resolution on a single FPGA device
    • Ryszard Szplet, Jozef Kalisz, Rafal Szymanowski. Interpolating time counter with 100 ps resolution on a single FPGA device [J]. IEEE Trans. Instrum. Measur., 2000, 49(4): 879-882.
    • (2000) IEEE Trans. Instrum. Measur. , vol.49 , Issue.4 , pp. 879-882
    • Szplet, R.1    Kalisz, J.2    Szymanowski, R.3
  • 9
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    • A novel time-to-digital converter with 150 ps time resolution and 2.5 ns pulse-pair resolution
    • Beyrouth (Liban)
    • Mohamed Serraj Andaloussi, Mounir Boukadoum, EI-Mostapha Aboulhamid. A novel time-to-digital converter with 150 ps time resolution and 2.5 ns pulse-pair resolution [C]. IEEE 14th International Conference on Microelectronics, Beyrouth (Liban), 2002. 123-126.
    • (2002) IEEE 14th International Conference on Microelectronics , pp. 123-126
    • Andaloussi, M.S.1    Boukadoum, M.2    Ei-Mostapha, A.3
  • 10
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    • A very preliminary study of time measurement based on FPGA
    • Jiang Xiaoshan, Sheng Huayi. A very preliminary study of time measurement based on FPGA [J]. Nuclear Electronics and Detection Technology, 2004, 24(5): 441-444.
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  • 11
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    • A high-resolution time-to-digital converter system based on digital delay line
    • Ding Jianguo, Shen Baoguo, Liu Songqiang. A high-resolution time-to-digital converter system based on digital delay line [J]. Nuclear Techniques, 2005, 28(3): 173-175.
    • (2005) Nuclear Techniques , vol.28 , Issue.3 , pp. 173-175
    • Ding, J.1    Shen, B.2    Liu, S.3
  • 12
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    • ProASIC PLUS flash family FPGAs
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    • (2005)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.