160-Gb/s bidirectional parallel optical transceiver module for board-level interconnects using a single-chip CMOS IC

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 1256-1261

  Doany, Fuad E ^a   Schow, Clint L ^a   Baks, Christian ^a   Budd, Russell ^a   Chang, Yin Jung ^b   Pepeljugoski, Petar ^a   Schares, Laurent ^a   Kuchta, Daniel ^a   John, Richard ^a   Kash, Jeffrey A ^a   Libsch, Frank ^a   Dangel, Roger ^c   Horst, Folkert ^c   Offre, Bert J ^c  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c IBM RESEARCH ZURICH   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

BIDIRECTIONAL PARALLEL OPTICAL TRANSCEIVER; BOARD-LEVEL INTERCONNECTS; HIGH-SPEED PERFORMANCE; TRANSCEIVER MODULES;

CHANNEL CAPACITY; CMOS INTEGRATED CIRCUITS; DATA REDUCTION; OPTICAL INTERCONNECTS; OPTOELECTRONIC DEVICES; PHOTODIODES;

TRANSCEIVERS;

EID: 35348844526     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373956     Document Type: Conference Paper

References (5)

1. C. Schow, F. Doany, O. Liboiron-Ladouceur, C. Baks, D.M. Kuchta, L. Schares, R. John, and J.A. Kash, "160-Gb/s, 16-Channel Full-Duplex, Single-Chip CMOS Optical Transceiver," OFC/NFOEC Conference, Anaheim, March 2007.
2. L. Schares et al., "Terabus: Terabit/second-class cardlevel optical interconnect technologies," IEEE J. Select. Topics Quantum Electron., Special Issue on Optoelectronic Packaging, Vol.12, No. 5, pp. 1032-1044, Sept./Oct. 2006.
3. C.Patel et al., "Silicon Carrier with Deep Through-Vias, Fine Pitch Wiring, and Through Cavity for Parallel Optical Transceiver," in. Proc. of 55th Electron. Comp. and Technol. Conf, pp. 1318-1324, June 2005.
4. Kyocera SLC Technologies, Yasu, Shiga, Japan.
5. D. Kucharski, Y. H. Kwark, D. M. Kuchta, K. T. Kornegay, M. R. T. Tan, C-K. Lynn, A. Tandon, "A 20Gb/s VCSEL Driver with Pre-Emphasis and Regulated Output Impedance in 0.13μm CMOS", in Proc. IEEE Intl. Solid-State Circuits Conf., San Francisco, CA, USA, Feb. 2005.