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Volumn 2001-January, Issue , 2001, Pages 17-22

Run-time characterization of irregular accesses applied to parallelization of irregular reductions

Author keywords

Application software; Computer science; Costs; Data structures; Kernel; Libraries; Polarization; Proposals; Runtime; Sparse matrices

Indexed keywords

COMPUTER SCIENCE; COSTS; DATA STRUCTURES; LIBRARIES; POLARIZATION;

EID: 35348812808     PISSN: 15302016     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPPW.2001.951841     Document Type: Conference Paper
Times cited : (2)

References (13)
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    • Matrix Market
  • 2
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    • 0030380793 scopus 로고    scopus 로고
    • Maximizing multiprocessor performance with the SUIF compiler
    • Dec.
    • M. W. H. et al. Maximizing multiprocessor performance with the SUIF compiler. Computer, 29(12):84, Dec. 1996.
    • (1996) Computer , vol.29 , Issue.12 , pp. 84
    • H, M.W.1
  • 7
    • 0030382364 scopus 로고    scopus 로고
    • Parallel programming with polaris
    • Dec.
    • W. B. et al. Parallel programming with polaris. Computer, 29(12):78, Dec. 1996.
    • (1996) Computer , vol.29 , Issue.12 , pp. 78
    • B, W.1
  • 13
    • 0033703258 scopus 로고    scopus 로고
    • Cacheminer: A runtime approach to exploit cache locality on SMP
    • Y. Yan, X. Zhang, and Z. Zhang. Cacheminer: A runtime approach to exploit cache locality on SMP. IEEE Trans. on Parall. and Distr. Systems, 11(4):357-374, 2000.
    • (2000) IEEE Trans. on Parall. and Distr. Systems , vol.11 , Issue.4 , pp. 357-374
    • Yan, Y.1    Zhang, X.2    Zhang, Z.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.