Encoded-low swing technique for ultra low power interconnect

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2778, Issue , 2003, Pages 240-251

  Krishnan, Rohini ^a   De Gyvez, Jose Pineda ^a   Veendrick, Harry J M ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ENCODING (SYMBOLS); FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT INTERCONNECTS;

CAPACITIVE LOADS; CIRCUIT IMPLEMENTATION; EXTENSIVE SIMULATIONS; INTERCONNECT CIRCUITS; LOW-POWER BUS ENCODING; POWER DELAY PRODUCT; POWER-DELAY PRODUCTS; POWER-SUPPLY NOISE;

SIGNAL TO NOISE RATIO;

EID: 35248878845     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-45234-8_24     Document Type: Article

References (9)

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