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Volumn , Issue , 2007, Pages 2230-2234

LADT arithmetic improved and hardware implemented for FPGA -Based ECG data compression

Author keywords

ECG data compression; FPGA; Hardware implementation; LADT algorithm

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; DATA COMPRESSION; ELECTROCARDIOGRAPHY; HIGH SPEED NETWORKS; LINEAR EQUATIONS;

EID: 35248840518     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICIEA.2007.4318807     Document Type: Conference Paper
Times cited : (5)

References (9)
  • 2
    • 0036086082 scopus 로고    scopus 로고
    • Wavelet-based ECG compression using dynamic vetor quantization with tree codevectors in single codebook
    • July
    • S.G. Miaou, H.L.Yen and C.L.Linn, "Wavelet-based ECG compression using dynamic vetor quantization with tree codevectors in single codebook," IEEE Trans. Biomed.Eng.,Vol.47,No.7,pp. 255 -258 July 2002.
    • (2002) IEEE Trans. Biomed.Eng , vol.47 , Issue.7 , pp. 255-258
    • Miaou, S.G.1    Yen, H.L.2    Linn, C.L.3
  • 3
    • 33744995306 scopus 로고    scopus 로고
    • An Effective and Efficient Compression Algorithm for ECG Signals With Irregular Periods
    • June
    • H. H. Chou, Y. J. Chen, Y. C. Shiau and T. S. Kuo, "An Effective and Efficient Compression Algorithm for ECG Signals With Irregular Periods", IEEE Trans Biomed.Eng.,Vol.53,No.6, pp. 1198 -1205, June 2006.
    • (2006) IEEE Trans Biomed.Eng , vol.53 , Issue.6 , pp. 1198-1205
    • Chou, H.H.1    Chen, Y.J.2    Shiau, Y.C.3    Kuo, T.S.4
  • 5
    • 0036110036 scopus 로고    scopus 로고
    • A. Mishra., A. E. Hubbard, A cochlear filter implemented with a field-programmable gate array, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 49, No. 1, pp. 54 - 60, January 2002.
    • A. Mishra., A. E. Hubbard, A cochlear filter implemented with a field-programmable gate array", IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 49, No. 1, pp. 54 - 60, January 2002.
  • 8
    • 35248838672 scopus 로고    scopus 로고
    • Spartan-3 FPGA Family: Complete Data Sheet, XILINX Corporation, DS099 March 4, 2004.
    • Spartan-3 FPGA Family: Complete Data Sheet, XILINX Corporation, DS099 March 4, 2004.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.