Memory bandwidth requirements of tile-based rendering

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3133, Issue , 2004, Pages 323-332

  Antochi, Iosif ^a   Juurlink, Ben ^a   Vassiliadis, Stamatis ^a   Liuha, Petri ^b  

^a Department of Microelectronics   (Netherlands)

^b NOKIA RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMMING INTERFACES (API); CELLULAR TELEPHONES; COMPUTER GRAPHICS; DATA REDUCTION; ECONOMIC AND SOCIAL EFFECTS; MEMORY ARCHITECTURE; MICROPROCESSOR CHIPS; MOBILE DEVICES; MOBILE PHONES; PIXELS; TELEPHONE SETS; THREE DIMENSIONAL COMPUTER GRAPHICS;

COLOR COMPONENT; EXTERNAL MEMORY ACCESS; GRAPHICS ACCELERATORS; MEMORY BANDWIDTHS; ON CHIP MEMORY; ON-CHIP BUFFERS; TILE-BASED RENDERING; TRADITIONAL ARCHITECTURE;

RENDERING (COMPUTER GRAPHICS);

EID: 35048836660     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-27776-7_34     Document Type: Article

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