Layout techniques for reduction of common mode current in static converters

Conference Record - IAS Annual Meeting (IEEE Industry Applications Society)

Volumn 5, Issue , 2006, Pages 2296-2303

  Aimé, Jérémie ^a,b,c   Roudet, James ^a,b   Vollaire, Christian ^b   Baudesson, Philippe ^c   Ecrabey, Jacques ^c  

^a LABORATOIRE D ELECTROTECHNIQUE DE GRENOBLE   (France)

^b ECOLE CENTRALE DE LYON   (France)

^c Schneider Electric 37   (France)

Author keywords

Common mode; Layout; PEEC method; Radiated perturbations

Indexed keywords

COMPUTER SIMULATION; EQUIVALENT CIRCUITS; MATHEMATICAL MODELS; PERTURBATION TECHNIQUES;

COMMON MODE; PEEC METHOD; RADIATED PERTURBATIONS;

ELECTRIC CONVERTERS;

EID: 34948825992     PISSN: 01972618     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IAS.2006.256862     Document Type: Conference Paper

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