45 nm node multi level interconnects with porous SiOCH dielectric k=2.5

2006 International Interconnect Technology Conference, IITC

Volumn , Issue , 2006, Pages 213-215

  Arnal, V ^a   Farcy, A ^a   Aimadeddine, M ^a   Icard, B ^b   Guedj, C ^b   Maitrejean, S ^b   Todeschini, J ^c   Besling, W ^c   Brun, P ^b   Ollier, E ^c   Jacquemin, J P ^c   Delsol, R ^c   Vannier, P ^a   Mellier, M ^c   Richard, E ^c   Fox, R ^d   Imbert, G ^a   Lefriec, Y ^a   Toffoli, A ^b   Torres, J ^a  

^a STMICROELECTRONICS   (France)

^b CEA LETI   (France)

^c NXP SEMICONDUCTORS   (Netherlands)

^d FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER; ELECTROMIGRATION; METALLIZING; METALS; PHYSICAL VAPOR DEPOSITION; SERPENTINE; SILICATE MINERALS; TECHNOLOGY;

45NM NODE; BEOL INTEGRATION; COPPER RESISTIVITY; DUAL DAMASCENE; INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE; LINE RESISTANCE; LINE WIDTHS; MULTI-LEVEL INTERCONNECTS; PERFORMANCE REQUIREMENTS; POROUS LOW-K;

NANOTECHNOLOGY;

EID: 34748906541     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IITC.2006.1648691     Document Type: Conference Paper

References (9)

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3. R. Fox et Al. IEDM 2005
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5. M. Aimadeddine et Al. Microelectronic Eng 82 (2005) 341-347
6. J.F. Guillaumond et al., IITC 2003 (2003) 132-134
7. W. Steinhogl et al, SISPAD 2003, 27-30
8. S.M. Rossnagel et al., J. Vav. Sci. Technil. B22 (2004) 240-247
9. S. Maitrejean et al. Submited to MAM 2006