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Volumn , Issue , 2007, Pages 3598-3601

On-line histogram equalization for flash ADC

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; FLASH MEMORY; GATES (TRANSISTOR); NATURAL FREQUENCIES;

EID: 34548861784     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.378531     Document Type: Conference Paper
Times cited : (5)

References (11)
  • 2
    • 84937350296 scopus 로고
    • Quantization for minimum distortion
    • March
    • J. Max, "Quantization for minimum distortion," IRE Trans. Info. Theory, vol. 6, no. 1, pp. 7-12, March 1960.
    • (1960) IRE Trans. Info. Theory , vol.6 , Issue.1 , pp. 7-12
    • Max, J.1
  • 3
    • 0020102027 scopus 로고
    • Least squares quantization in PCM
    • March
    • S. P. Lloyd, "Least squares quantization in PCM," IEEE Trans. Info. Theory, vol. 28, no. 2, pp. 129-137, March 1982.
    • (1982) IEEE Trans. Info. Theory , vol.28 , Issue.2 , pp. 129-137
    • Lloyd, S.P.1
  • 4
    • 58449123171 scopus 로고    scopus 로고
    • Offset compensation in flash ADCs using floating-gate circuits
    • May
    • P. Brady and P. Hasler, "Offset compensation in flash ADCs using floating-gate circuits," in Proc. IEEE ISCAS, May 2005.
    • (2005) Proc. IEEE ISCAS
    • Brady, P.1    Hasler, P.2
  • 6
    • 34547980583 scopus 로고    scopus 로고
    • A 1.2GHz adaptive floating gate comparator with 13-bit resolution
    • May
    • Y. Wong, M. Cohen, and P. Abshire, "A 1.2GHz adaptive floating gate comparator with 13-bit resolution," in Proc. IEEE ISCAS, May 2005, pp. 6146-6149.
    • (2005) Proc. IEEE ISCAS , pp. 6146-6149
    • Wong, Y.1    Cohen, M.2    Abshire, P.3
  • 9
    • 0035696160 scopus 로고    scopus 로고
    • A 6-b 1.3-Gsample/s A/D converter in 0.35-μm CMOS
    • December
    • M. Choi and A. Abidi, "A 6-b 1.3-Gsample/s A/D converter in 0.35-μm CMOS," IEEE JSSC, vol. 36, no. 12, pp. 1847-1858, December 2001.
    • (2001) IEEE JSSC , vol.36 , Issue.12 , pp. 1847-1858
    • Choi, M.1    Abidi, A.2
  • 10
    • 0030828211 scopus 로고    scopus 로고
    • New single-clock CMOS latches and flipflops with improved speed and power savings
    • January
    • J. Yuan, and C. Svensson, "New single-clock CMOS latches and flipflops with improved speed and power savings," IEEE JSSC, vol. 32, no. 1, pp. 62-69, January 1997.
    • (1997) IEEE JSSC , vol.32 , Issue.1 , pp. 62-69
    • Yuan, J.1    Svensson, C.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.