A 4-bits trimmed CMOS bandgap reference with an improved matching modeling design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2007, Pages 1911-1914

  Brito, Juan Pablo Martinez ^a   Bampi, Sergio ^a   Klimach, Hamilton ^a  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

CMOS bandgap references; MOSFET mismatch modeling; Process variations; Trimming circuit

Indexed keywords

ENERGY GAP; MONTE CARLO METHODS; NETWORKS (CIRCUITS);

CMOS BANDGAP REFERENCES; MOSFET MISMATCH MODELING; PROCESS VARIATIONS; TRIMMING CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 34548856004     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2007.378348     Document Type: Conference Paper

References (14)

1. R. J. Widlar, "New developments In IC voltage regulators," IEEE J. Solid State Circuits, vol. SC-6, pp. 2-7, Feb. 1971.
2. B.S. Song, P.R. Gray "A Precision Curvature-Compensated CMOS Bandgap Reference", IEEE Journal of Solid-State Circuits, Vol. SC-18, No 6, December 1984, pages 634-643.
3. Tsividis, Y.P.; Ulmer, R.W., "A CMOS voltage reference," Solid-State Circuits, IEEE Journal of, vol.13, no.6pp. 774-778, Dec 1978.
4. Malcovati, P.; Maloberti, F.; Fiocchi, C.; Pruzzi, M., "Curvature-compensated BiCMOS bandgap with 1-V supply voltage," Solid-State Circuits, IEEE Journal of, vol.36, no.7pp. 1076-1081, Jul 2001.
5. Vittoz, E.A.; Neyroud, O., "A low-voltage CMOS bandgap reference," Solid-State Circuits, IEEE Journal of, vol.14, no.3pp. 573-579, Jun 1979.
6. Siew Kuok Hoon; Jun Chen; Maloberti, F., "An improved bandgap reference with high power supply rejection," Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, vol.5, no.pp. V-833-V-836 vol.5, 2002.
7. Gupta, V.; Rincon-Mora, G.A., "Predicting and designing for the impact of process variations and mismatch on the trim range and yield of bandgap references," Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on, vol., no.pp. 503-508, 21-23 March 2005.
8. Sengupta, S.; Carastro, L.; Allen, P.E., "Design considerations in bandgap references over process variations," Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium, on, vol., no.pp. 3869-3872 Vol. 4, 23-26 May 2005.
9. Pelgrom, M.J.M.; Tuinhout, H.P.; Vertregt, M., "Transistor matching in analog CMOS applications," Electron Devices Meeting, 1998. IEDM '98 Technical Digest., International, vol., no.pp.915-918, 6-9 Dec 1998.
10. Pelgrom, M.J.M.; Duinmaijer, A.C.J.; Welbers, A.P.G., "Matching properties of MOS transistors," Solid-State Circuits, IEEE Journal of, vol 24, no.5pp. 1433-1439, Oct 1989.
11. Kinget, P.R., "Device mismatch and tradeoffs in the design of analog circuits," Solid-State Circuits, IEEE Journal of, vol.40, no.6pp. 1212-1224, June 2005.
12. Kinget, P.; Steyaert, M., "Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits," Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996, vol., no.pp.333-336, 5-8 May 1996
13. Austria Mikro Systeme International AG "0.35μm CMOS C35 Matching Parameters", Document N° ENG - 228, Rev. 2.0.
14. Rincon-Mora, G.A. "Voltage References: From Diodes to Precision High-Order Bandgap Circuits," IEEE Press, John Wiley & Sons, Inc., 2002, Pages: 192.