A voltage regulator for subthreshold logic with low sensitivity to temperature and process variations

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 530-532

  De Vita, Giuseppe ^a   Iannaccone, Giuseppe ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC DEVICES; MOS DEVICES; THERMAL EFFECTS; TIME DELAY; VOLTAGE CONTROL;

PROCESS VARIATIONS; STANDARD DEVIATION; SUBTHRESHOLD LOGIC;

VOLTAGE REGULATORS;

EID: 34548853428     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373528     Document Type: Conference Paper

References (5)

1. H. Soeleman and K. Roy, "Ultra-Low Power Digital Subthreshold Logic Circuits," Proc. Int'l. Symp. Low Power Electronics and Design, pp. 94-96, 1999.
2. Y. Taur and T.H. Ning, Fundamentals of Modem VLSI Devices, Cambridge University Press, 1998, pp. 126-128.
3. H. Soeleman, K. Roy and U.C. Paul, "Robust Subthreshold Logic for Ultra-Low Power Operation," IEEE T. VLSI Systems, pp. 90-99, Jan., 2001.
4. B. Zhai et al., "Analysis and Mitigation of Variability in Subthreshold Design, "Proc. Int'l. Symp. Low Power Electronics and Design, pp. 20-25, 2005.
5. G. De Vita and C. Iannaccone, "A 300 nW, 12 ppm/°C Voltage Reference in Digital 0.35 μm CMOS Process," Symp. VLSI Circuits, pp. 81-82, 2006.