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Volumn , Issue , 2007, Pages 805-808

Low-power low-noise neural amplifier in 0.18μm FD-SOI technology

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CONSTRAINT THEORY; ELECTRIC POWER UTILIZATION; RESISTORS; SILICON ON INSULATOR TECHNOLOGY;

EID: 34548850397     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (13)
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    • Functional electrical stimulation cycle ergometer exercise for spinal cord injured patients
    • R. P. Wider, E. V. Jones, T. C. Wind and R. F. Edlich, "Functional electrical stimulation cycle ergometer exercise for spinal cord injured patients," Journal of Long Term Effects of Medical Implants, 12(3), pp. 161-74, 2002.
    • (2002) Journal of Long Term Effects of Medical Implants , vol.12 , Issue.3 , pp. 161-174
    • Wider, R.P.1    Jones, E.V.2    Wind, T.C.3    Edlich, R.F.4
  • 3
    • 0038718680 scopus 로고    scopus 로고
    • A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications
    • June
    • R. R. Harrison and C. Charles, "A Low-Power Low-Noise CMOS Amplifier for Neural Recording Applications," IEEE Journal of Solid-State Circuits, Vol.38, No.6, June 2003.
    • (2003) IEEE Journal of Solid-State Circuits , vol.38 , Issue.6
    • Harrison, R.R.1    Charles, C.2
  • 4
    • 84874126962 scopus 로고    scopus 로고
    • A Floating Gate Common Mode Feedback Circuit for Low Noise Amplifier
    • Las Vegas, USA, Feb
    • C. Charles and R. R. Harrison, "A Floating Gate Common Mode Feedback Circuit for Low Noise Amplifier," IEEE Southwest Symposium, on Mixed Signal Design, pp.180-185, Las Vegas, USA, Feb. 2003.
    • (2003) IEEE Southwest Symposium, on Mixed Signal Design , pp. 180-185
    • Charles, C.1    Harrison, R.R.2
  • 5
    • 0036612483 scopus 로고    scopus 로고
    • Transconductance amplifier structures with very small transconductances: A comparative design approach
    • May 23
    • A. Veeravalli, E. Sanchez-Sinencio, and J. Silva-Martinez, "Transconductance amplifier structures with very small transconductances: A comparative design approach," IEEE J. Solid-State Circuits, Vol. 37, No. 6, pp. 530-532, May 23 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , Issue.6 , pp. 530-532
    • Veeravalli, A.1    Sanchez-Sinencio, E.2    Silva-Martinez, J.3
  • 6
    • 0026834706 scopus 로고
    • An implantable CMOS circuit interface for multiplexed microelectrode recording arrays
    • Mar
    • J. Ji and K. D. Wise, "An implantable CMOS circuit interface for multiplexed microelectrode recording arrays," IEEE J. Solid-State Circuits, vol. 27, pp. 433-443, Mar. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 433-443
    • Ji, J.1    Wise, K.D.2
  • 7
    • 0012146295 scopus 로고    scopus 로고
    • A new DC baseline stabilization scheme for neural recording microprobes
    • Atlanta, GA, Oct. 13-16
    • A. P. Chandran, K. Najafi, and K. D. Wise, "A new DC baseline stabilization scheme for neural recording microprobes," in Proc. 1st Joint EMBS/BMES Conf. Atlanta, GA, Oct. 13-16, 1999.
    • (1999) Proc. 1st Joint EMBS/BMES Conf
    • Chandran, A.P.1    Najafi, K.2    Wise, K.D.3
  • 8
    • 1942542472 scopus 로고    scopus 로고
    • A Fully Integrated Neural Recording Amplifier with DC Input Stabilization
    • May
    • P. Mohseni and K. Najafi, "A Fully Integrated Neural Recording Amplifier with DC Input Stabilization," IEEE Transactions on Biomedical Engineering, Vol.51, No.5, May 2004.
    • (2004) IEEE Transactions on Biomedical Engineering , vol.51 , Issue.5
    • Mohseni, P.1    Najafi, K.2
  • 11
    • 34247397908 scopus 로고    scopus 로고
    • Massachusetts Institute of Technology Lincoln Laboratory, September
    • Massachusetts Institute of Technology Lincoln Laboratory, MITLL low-power FDSOI CMOS process: Design guide, September 2006.
    • (2006) MITLL low-power FDSOI CMOS process: Design guide
  • 13
    • 0032074892 scopus 로고    scopus 로고
    • Fully-Depleted SOI CMOS for Analog Applications
    • May
    • J. P. Colinge, "Fully-Depleted SOI CMOS for Analog Applications," IEEE Transaction on Electron Devices, vol. 45, no. 5, May 1998.
    • (1998) IEEE Transaction on Electron Devices , vol.45 , Issue.5
    • Colinge, J.P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.