A 100mW 9.6Gb/s transceiver in 90nm CMOS for next-generation memory interfaces

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2006, Pages

  Prete, Edoardo ^a   Scheideler, Dirk ^a   Sanders, Anthony ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

HARMONIC GENERATION; INTERFACES (COMPUTER); JITTER; NETWORKS (CIRCUITS);

NEXT-GENERATION MEMORY INTERFACES;

TRANSCEIVERS;

EID: 34548843981     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. 2 2.5GHz Multi-Phase Generator PLL with 360° Digitally Programmable Phase Shift for 10Gb/s Serial Links," IEEE ISSCC Dig. Tech. Papers, pp. 410-412, Feb., 2005.
2. R. Farjad-Rad et al., "A 0.4-μm CMOS 10-Gb/s 4-PAM Pre-Emphasis Serial Link Transmitter," IEEE J. Solid-State Circuits, vol. 34, pp. 580-585, May, 1999.