A 0.18-μm CMOS squarer circuit for a non-coherent UWB receiver

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2007, Pages 421-424

  Gerosa, A ^a   Soldan, M ^a   Bevilacqua, A ^a   Neviani, A ^a  

^a UNIVERSITY OF PADOVA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER SIMULATION; ELECTRIC POWER UTILIZATION; SIGNAL RECEIVERS; TRANSISTORS;

COHERENT UWB RECEIVER; QUADRATIC LAWS; SQUARER CIRCUIT;

CMOS INTEGRATED CIRCUITS;

EID: 34548827328     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

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2. S. C. Li and K.-L. Lin, "A ±1.5V CMOS Four-Quadrant Analogue Multiplier Using 3GHz Analogue Squaring Circuits," in Proc. ISCAS-98, Monterey, USA, May 1998, vol. 2, pp. 347-350.
3. E. Seevinck and R. F. Wassenaar, "A Versatile CMOS Linear Transconductor/Square-Law Function Circuit," IEEE J. Solid-State Circuits, vol. sc-22, no. 3, pp. 366-377, Jun 1987.
4. A. Demosthenous and M. Panovic, "Low-Voltage MOS Linear Transconductor/Squarer and Four-Quadrant Multiplier for Analog VLSI," IEEE Trans. Circuits Syst. I, vol. 52, no. 9, pp. 1721-1731, Sep 2005.
5. B. Boonchu and W. Surakampontorn, "A CMOS Current-Mode Squarer/Rectifier Circuit," in Proc. ISCAS-03, Bangkok, Thailand, May 2003, vol. I, pp. 405-408.