Hardware complexity of modular multiplication and exponentiation

IEEE Transactions on Computers

Volumn 56, Issue 10, 2007, Pages 1308-1319

  David, Jean Pierre ^a   Kalach, Kassem ^b   Tittley, Nicolas ^c  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

^c UNIVERSITÉ DE MONTRÉAL   (Canada)

Author keywords

Cryptography; Hardware complexity; Modular arithmetic; Multiplication

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL ARITHMETIC; FAST FOURIER TRANSFORMS;

HARDWARE COMPLEXITY; MODULAR EXPONENTIATION; MODULAR MULTIPLICATION; MONTGOMERY MULTIPLICATION;

PUBLIC KEY CRYPTOGRAPHY;

EID: 34548811405     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2007.1084     Document Type: Review

References (19)

1. W. Diffie and M. Hellman, "New Directions in Cryptography," IEEE Trans. Information Theory, vol. 22, no. 6, pp. 644-654, 1976.
2. P. Montgomery, "Modular Multiplication without Trial Division," Math. Computation, vol. 44, no. 170, pp. 519-521, 1985.
3. K. Posch and R. Posch, "Modulo Reduction in Residue Number Systems," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 5, pp. 449-454, 1995.
4. J. Bajard, L. Didier, and P. Kornerup, "An RNS Montgomery's Modular Multiplication Algorithm," IEEE Trans. Computers, vol. 47, no. 2, pp. 167-178, Feb. 1998.
5. J. Bajard, L. Didier, and P. Kornerup, "Modular Multiplication and Base Extensions in Residue Number Systems," Proc. 15th IEEE Symp. Computer Arithmetic (ARITH '01), pp. 59-65, 2001.
6. J.-J. Quisquater and C. Couvreur, "Fast Decipherment Algorithm for RSA Public-Key Cryptosystem," Electronics Letters, vol. 18, pp. 905-907, 1982.
7. J. Grosschädl, "The Chinese Remainder Theorem and Its Application in a High-Speed RSA Crypto Chip," Proc. 16th Ann. Computer Security Application Conf. (ACSAC '00), pp. 384-393, 2000.
8. S.E. Eldridge and C.D. Walter, "Hardware Implementation of Montgomery's Modular Multiplication Algorithm," IEEE Trans. Computers, vol. 42, no. 6, pp. 693-699, June 1993.
9. H. Orup, "Simplifying Quotient Determination in High-Radix Modular Multiplication," Proc. 12th Symp. Computer Arithmetic (ARITH '95 pp. 193-199, 1995.
10. T. Blum and C. Paar, "High-Radix Montgomery Modular Exponentiation on Reconfigurable Hardware," IEEE Trans. Computers, vol. 50, pp. 759-764, 2001.
11. A.F. Tenca and C.K. Koç, "A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm," IEEE Trans. Computers, vol. 52, no. 9, pp. 1215-1221, Sept. 2003.
12. C. McIvor, M. McLoone, J.V. McCanny, A. Daly, and W. Marnane, "Fast Montgomery Modular Multiplication and RSA Cryptographic Processor Architectures," Proc. 37th Ann. Asilomar Conf. Signals, Systems, and Computers, 2003.
13. C. McIvor, M. McLoone, and J.V. McCanny, "Modified Montgomery Modular Multiplication and RSA Exponentiation," IEE Proc. Computers and Digital Techniques, vol. 151, pp. 402-408, 2004.
14. V. Bunimov, M. Schimmler, and B. Tolg, "A Complexity-Effective Version of Montgomery's Algorithm," Proc. 29th Ann. Int'l Symp. Computer Architecture (ISCA '02) Workshop Complexity Effective Designs, 2002.
15. A.A. Karatsuba and Y. Ofman, "Multiplication of Multidigit Numbers on Automata," Soviet Physics Doklady, vol. 7, pp. 595-596, 1963.
16. J.W. Cooley and J.W. Tukey, "An Algorithm for the Machine Calculation of Complex Fourier Series," Math. Computation, vol. 19, pp. 297-301, 1965.
17. S. Craven, C. Patterson, and P. Athanas, "Super-Sized Multiplies: How Do FPGAs Fare in Extended Digit Multipliers?" Proc. Seventh Ann. Conf. Military and Aerospace Programmable Logic Devices (MAPLD '04 , 2004.
18. G. Brassard and P. Bratley, Algorithmics Theory and Practice. Prentice Hall, 1988.
19. Altera, Altera Corp., http://www.altera.com, 2006.