-
1
-
-
85034497704
-
Implementing the Rivest, Shamir and Adleman public-key encryption algorithm on a standard digital signal processor
-
A. M. Odlyzko, editor, Advances in cryptology: CRYPTO '86: proceedings, Springer-Verlag, Berlin, Germany
-
P. Barrett. Implementing the Rivest, Shamir and Adleman public-key encryption algorithm on a standard digital signal processor. In A. M. Odlyzko, editor, Advances in cryptology: CRYPTO '86: proceedings, volume 263 of Lecture Notes in Computer Science, pp 311-323, Springer-Verlag, Berlin, Germany, 1987.
-
(1987)
Lecture Notes in Computer Science
, vol.263
, pp. 311-323
-
-
Barrett, P.1
-
2
-
-
0020102009
-
A regular layout for parallel adders
-
R. P. Brent and H. T. Kung. A regular layout for parallel adders. IEEE Transactions on Computers, C-31(3), pp. 260-264, 1982.
-
(1982)
IEEE Transactions on Computers
, vol.C-31
, Issue.3
, pp. 260-264
-
-
Brent, R.P.1
Kung, H.T.2
-
5
-
-
0008489840
-
Seminumerical Algorithms
-
Addison-Wesley, Reading, MA, USA
-
D. E. Knuth. Seminumerical Algorithms, volume 2 of The Art of Computer Programming. Addison-Wesley, Reading, MA, USA, 1969.
-
(1969)
The Art of Computer Programming
, vol.2
-
-
Knuth, D.E.1
-
6
-
-
0042981058
-
A Course in Number Theory and Cryptography
-
Springer-Verlag, Berlin, Germany, second edition
-
N. Koblitz. A Course in Number Theory and Cryptography, volume 114 of Graduate texts in mathematics. Springer-Verlag, Berlin, Germany, second edition, 1994.
-
(1994)
Graduate Texts in Mathematics
, vol.114
-
-
Koblitz, N.1
-
8
-
-
84944325583
-
Testing a High-Speed Data Path: The Design of the RSAβ Crypto Chip
-
November
-
W. Mayerwieser, K. C. Posch, R. Posch, and V. Schindler. Testing a High-Speed Data Path: The Design of the RSAβ Crypto Chip. J.UCS: Journal of Universal Computer Science, 1(11) pp. 728-744, November 1995.
-
(1995)
J.UCS: Journal of Universal Computer Science
, vol.1
, Issue.11
, pp. 728-744
-
-
Mayerwieser, W.1
Posch, K.C.2
Posch, R.3
Schindler, V.4
-
9
-
-
0004192381
-
Handbook of applied cryptography
-
CRC Press, Boca Raton, FL, USA
-
A. J. Menezes, P. C. Van Oorschot, and S. A. Vanstone. Handbook of applied cryptography. The CRC Press series on discrete mathematics and its applications. CRC Press, Boca Raton, FL, USA, 1997.
-
(1997)
The CRC Press Series on Discrete Mathematics and Its Applications
-
-
Menezes, A.J.1
Van Oorschot, P.C.2
Vanstone, S.A.3
-
11
-
-
84949521690
-
Approaching encryption at ISDN speed using partial parallel modulus multiplication
-
Institutes for Information Processing Graz, Graz, Austria, November
-
K. C. Posch and R. Posch. Approaching encryption at ISDN speed using partial parallel modulus multiplication. IIG report 276, Institutes for Information Processing Graz, Graz, Austria, November 1989.
-
(1989)
IIG Report 276
-
-
Posch, K.C.1
Posch, R.2
-
12
-
-
0020194569
-
Fast decipherment algorithm for RSA public-key cryptosystem
-
October
-
J.-J. Quisquater and C. Couvreur. Fast decipherment algorithm for RSA public-key cryptosystem. IEE Electronics Letters, 18(21), pp. 905-907, October 1982.
-
(1982)
IEE Electronics Letters
, vol.18
, Issue.21
, pp. 905-907
-
-
Quisquater, J.-J.1
Couvreur, C.2
-
13
-
-
0003850954
-
Digital Integrated Circuits - A Design Perspective
-
Prentice Hall, Upper Saddle River, NJ, USA
-
J. M. Rabaey. Digital Integrated Circuits - A Design Perspective. Prentice Hall Electronics and VLSI Series, Prentice Hall, Upper Saddle River, NJ, USA, 1996.
-
(1996)
Prentice Hall Electronics and VLSI Series
-
-
Rabaey, J.M.1
-
14
-
-
0017930809
-
A Method for Obtaining Digital Signatures and Public Key Cryptosystems
-
February
-
R. L. Rivest, A. Shamir, and L. Adleman. A Method for Obtaining Digital Signatures and Public Key Cryptosystems. Communications of the Association for Computing Machinery, 21(2) pp. 120-126, February 1978.
-
(1978)
Communications of the Association for Computing Machinery
, vol.21
, Issue.2
, pp. 120-126
-
-
Rivest, R.L.1
Shamir, A.2
Adleman, L.3
-
15
-
-
0005325338
-
A low-power true single phase clocked (TSPC) full-adder
-
Neuchâtel, Switzerland
-
V. Schindler. A low-power true single phase clocked (TSPC) full-adder. Proceedings of the 22nd ESSCIRC, Neuchâtel, Switzerland, pp. 72-75, 1996.
-
(1996)
Proceedings of the 22nd ESSCIRC
, pp. 72-75
-
-
Schindler, V.1
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