An efficient polynomial multiplier in GF(2m) and its application to ECC designs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 1253-1258

  Peter, Steffen ^a   Langendörfer, Peter ^a  

^a IHP   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; ELECTRIC POWER UTILIZATION; ITERATIVE METHODS; SILICON;

HARDWARE ACCELERATORS; POLYNOMIAL MULTIPLIERS;

POLYNOMIALS;

EID: 34548331460     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364469     Document Type: Conference Paper

References (15)

1. Z. Dyka and P. Langendoerfer. Area efficient hardware implementation of elliptic curve cryptography by iteratively applying karatsuba's method. In DATE, pages 70-75, 2005.
2. Elliptic semiconductor. CLP-22 Elliptic Curve Point Multiplier Core, 2006. Available from http://www.ellipticsemi.com/CLP-22.60102.pdf.
3. N. Gura, S. Shantz, H. Eberle, D. Finchelstein, S. Gupta, V. Gupta, and D. Stebila. An end-to-end systems approach to elliptic curve cryptography. In CHES '02: Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems, 2002.
4. m) using normal bases. Inf. Comput., 78(3):171-177, 1988.
5. A. Karatsuba and Y. Ofman. Multiplication of multi-digit numbers on automata. Doklady Akademii nauk SSSR, 145:293-294, 1962.
6. m) without precomputation. In CHES '99: Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems, 1999.
7. m). In CHES '00: Proceedings of the Second International Workshop on Cryptographic Hardware and Embedded Systems, 2000.
8. m). In Proceedings of International Conference on Computer Science and Technology CST, 2003.
9. m). In IPDPS, 2004.
10. A. Satoh and K. Takano. A scalable dual-field elliptic curve cryptographic processor. IEEE Trans. Comput., 52(4):449-460, 2003.
11. C. Shu, K. Gaj, and T. A. El-Ghazawi. Low latency elliptic curve cryptography accelerators for nist curves over binary fields. In Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, FPT 2005.
12. Synopsys Inc. PrimePower: Full-Chip Dynamic Power Analysis for Multimillion-Gate Designs, 2005. Available from Synopsys website http://www.synopsys.com/products/power/primepower.ds.pdf.
13. F. U.S. Department of Commerce/NIST. Digital Signature Standard (DSS), FIPS PUB 186-2, Jan. 27, 2000.
14. A. Weimerskirch and C. Paar. Generalizations of the karatsuba algorithm for polynomial multiplication.
15. J. Wolkerstorfer. Is elliptic-curve cryptography suitable to secure rfid tags? In Workshop on RFID and Light-Weight Crypto, 7 2005.