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1
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34548259634
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A transformation based algorithm for ternary reversible logic synthesis using universally controlled ternary gates
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Tamecula, California, USA, 2-4 June
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E. Curtis, M. Perkowski, "A transformation based algorithm for ternary reversible logic synthesis using universally controlled ternary gates", Proc. IWLS 2004, Tamecula, California, USA, 2-4 June 2004.
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(2004)
Proc. IWLS 2004
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Curtis, E.1
Perkowski, M.2
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2
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51549108205
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Synthesis of reversible circuits from a subset of Muthukrishnan-Stroud quantum multi-valued gates
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Tamecula, California, USA, 2-4 June
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N. Denier, B. Yen, M. Perkowski, and P. Kerntopf, "Synthesis of reversible circuits from a subset of Muthukrishnan-Stroud quantum multi-valued gates", Proc. IWLS 2004, Tamecula, California, USA, 2-4 June 2004.
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(2004)
Proc. IWLS 2004
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Denier, N.1
Yen, B.2
Perkowski, M.3
Kerntopf, P.4
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3
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23144441483
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Ternary GFSOP minimization using Kronecker decision diagrams and their synthesis with quantum cascades
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M. H. A. Khan, M. A. Perkowski, M. R. Khan, and P. Kerntopf, "Ternary GFSOP minimization using Kronecker decision diagrams and their synthesis with quantum cascades", Journal of Multiple-Valued Logic and Soft Computing. Vol. 11, 2005, pp. 567-602.
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(2005)
Journal of Multiple-Valued Logic and Soft Computing
, vol.11
, pp. 567-602
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Khan, M.H.A.1
Perkowski, M.A.2
Khan, M.R.3
Kerntopf, P.4
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4
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4344632690
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Genetic algorithm based synthesis of multi-output ternary functions using quantum cascade of generalized ternary gates
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Portland, Oregon, USA, 19-23 June
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M. H. A. Khan, M. A. Perkowski, "Genetic algorithm based synthesis of multi-output ternary functions using quantum cascade of generalized ternary gates", Proc. of 2004 IEEE Congress on Evolutionary Computation (CEC 2004), Portland, Oregon, USA, 19-23 June 2004, pp. 2194-2201.
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(2004)
Proc. of 2004 IEEE Congress on Evolutionary Computation (CEC 2004)
, pp. 2194-2201
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Khan, M.H.A.1
Perkowski, M.A.2
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5
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3142779405
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Ternary Galois field expansions for reversible logic and Kronecker decision diagrams for ternary GFSOP minimization
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Toronto, Canada, 19-22 May
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M. H. A. Khan, M. A. Perkowski, and M. R. Khan, "Ternary Galois field expansions for reversible logic and Kronecker decision diagrams for ternary GFSOP minimization", Proc. of 34th IEEE Int. Symp. on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 58-67.
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(2004)
Proc. of 34th IEEE Int. Symp. on Multiple-Valued Logic (ISMVL 2004)
, pp. 58-67
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Khan, M.H.A.1
Perkowski, M.A.2
Khan, M.R.3
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6
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0038157078
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Multi-output Galois field sum of products synthesis with new quantum cascades
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Tokyo, Japan, 16-19 May
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M. H. A. Khan, M. A. Perkowski, and P. Kerntopf, "Multi-output Galois field sum of products synthesis with new quantum cascades", Proc. 33rd IEEE Int. Symp. On Multiple-Valued Logic (ISMVL 2003), Tokyo, Japan, 16-19 May 2003, pp. 146-153.
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(2003)
Proc. 33rd IEEE Int. Symp. On Multiple-Valued Logic (ISMVL 2003)
, pp. 146-153
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Khan, M.H.A.1
Perkowski, M.A.2
Kerntopf, P.3
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7
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3142697170
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A synthesis method for MVL reversible logic
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Toronto, Canada, 19-22 May
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D. M. Miller, G. Dueck, and D. Maslov, "A synthesis method for MVL reversible logic", Proc. 34th IEEE Int. Symp. On Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 74-80.
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(2004)
Proc. 34th IEEE Int. Symp. On Multiple-Valued Logic (ISMVL 2004)
, pp. 74-80
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Miller, D.M.1
Dueck, G.2
Maslov, D.3
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8
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4243483687
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Multivalued logic gates for quantum computation
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62, 052309/1-8
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A. Muthukrishnan, C. R. Stroud Jr., "Multivalued logic gates for quantum computation", Physical Review A, 62, 2000, 052309/1-8.
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(2000)
Physical Review A
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Muthukrishnan, A.1
Stroud Jr., C.R.2
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9
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34548231211
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A minimal and universal test set for multiple-valued Galois field sumof-products circuits
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Fukuoka, Japan, May
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th Workshop on Post-Binary ULSI Systems, Fukuoka, Japan, May 1998, pp. 50-51.
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(1998)
th Workshop on Post-Binary ULSI Systems
, pp. 50-51
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Kalay, U.1
Hall, D.2
Perkowski, M.3
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