Probabilistic congestion prediction with partial blockages

Proceedings - Eighth International Symposium on Quality Electronic Design, ISQED 2007

Volumn , Issue , 2007, Pages 841-846

  Li, Zhuo ^a   Alpert, Charles J ^a   Quay, Stephen T ^a   Sapatnekar, Sachin ^b   Shi, Weiping ^c  

^a IBM   (United States)

^b University of Minnesota

^c Department of Electrical and Computer Engineering

Author keywords

[No Author keywords available]

Indexed keywords

OPTIMIZATION; PROBABILISTIC LOGICS; ROUTERS; ROUTING ALGORITHMS;

PARTIAL WIRING BLOCKAGES; PROBABILISTIC ROUTING; ROUTING CONGESTION ESTIMATION;

CONGESTION CONTROL (COMMUNICATION);

EID: 34548133275     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2007.124     Document Type: Conference Paper

References (7)

1. J. Lou, S. Krishnamoorthy, and H. S. Sheng, "Estimating routing congestion using probabilistic analysis," in Proceedings of ISPD, pp. 112-117, 2001.
2. J. Westra, C. Bartels, and P. Groeneveld, "Probabilistic congestion prediction," in Proceedings of ISPD, pp. 204-209, 2004.
3. C-L. E. Cheng, "Risa: accurate and efficient placement routability modeling," in Proceedings of ICCAD, pp. 690-695, 1994.
4. M. Wang, X. Yang, K. Eguro, and M. Sarrafzadeh, "Multi-center congestion estimation and minimization during placement," in Proceedings of ISPD, pp. 147-152, 2000.
5. J. Cong and P. H. Madden, "Performance driven multi-layer general area routing for pcb/mcm designs," in Proceedings of DAC, pp. 356-361, 1998.
6. H.-M. Chen, H. Zhou, F. Y. YOung, D. F. Wong, H. H. Yang, and N. Sherwani, "Integrated floorplanning and interconnect planning," in Proceedings of ICCAD, pp. 354-357, 1999.
7. Y. Ma, X. Hong, S. Dong, S. Chen, Y. Cai, C. K. Cheng, and J. Gu, "Dynamic global buffer planning optimization based on detail block locating and congestion analysis," in Proceedings of DAC, pp. 806-811, 2003.