-
1
-
-
0033706197
-
A survey of design techniques for system-level dynamic power management
-
L. Benini, A. Bogliolo, and G. D. Micheli. A survey of design techniques for system-level dynamic power management. IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, 8(3):299-316, 2000.
-
(2000)
IEEE Transactions on Very Large Scale Integration (TVLSI) Systems
, vol.8
, Issue.3
, pp. 299-316
-
-
Benini, L.1
Bogliolo, A.2
Micheli, G.D.3
-
2
-
-
0032674656
-
Policy optimization for dynamic power management
-
L. Benini, A. Bogliolo, G. Paleologo, and G. D. Micheli. Policy optimization for dynamic power management. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(6):813-833, 1999.
-
(1999)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
, vol.18
, Issue.6
, pp. 813-833
-
-
Benini, L.1
Bogliolo, A.2
Paleologo, G.3
Micheli, G.D.4
-
3
-
-
0003000445
-
Designing Low-power Circuits: Practical Recipes
-
Mar
-
L. Benini, G. De Micheli, and E. Macii. Designing Low-power Circuits: Practical Recipes. IEEE Circuits and Systems Magazine, 1(1):6-25, Mar. 2001.
-
(2001)
IEEE Circuits and Systems Magazine
, vol.1
, Issue.1
, pp. 6-25
-
-
Benini, L.1
De Micheli, G.2
Macii, E.3
-
5
-
-
21844505024
-
Model checking of probabilistic and nondeterministic systems
-
Proc. Foundations of Software Technology and Theoretical Computer Science, Springer
-
A. Bianco and L. de Alfaro. Model checking of probabilistic and nondeterministic systems. In Proc. Foundations of Software Technology and Theoretical Computer Science, volume 1026 of LNCS, pages 499-513. Springer, 1995.
-
(1995)
LNCS
, vol.1026
, pp. 499-513
-
-
Bianco, A.1
De Alfaro, L.2
-
7
-
-
0003096318
-
A logic for reasoning about time and probability
-
H. Hansson and B. Jonsson. A logic for reasoning about time and probability. Formal Aspects of Computing, 6:512-535, 1994.
-
(1994)
Formal Aspects of Computing
, vol.6
, pp. 512-535
-
-
Hansson, H.1
Jonsson, B.2
-
10
-
-
0041498459
-
Model checking expected time and expected reward formulae with random time bounds
-
To appear
-
M. Kwiatkowska, G. Norman, and A. Pacheco. Model checking expected time and expected reward formulae with random time bounds. In 2nd Euro-Japanese Workshop on Stochastic Risk Modelling for Finance, Insurance, Production and Reliability, 2002. To appear.
-
(2002)
2nd Euro-Japanese Workshop on Stochastic Risk Modelling for Finance, Insurance, Production and Reliability
-
-
Kwiatkowska, M.1
Norman, G.2
Pacheco, A.3
-
11
-
-
84863981780
-
PRISM: Probabilistic symbolic model checker
-
Proc. TOOLS'02, Springer
-
M. Kwiatkowska, G. Norman, and D. Parker. PRISM: Probabilistic symbolic model checker. In Proc. TOOLS'02, volume 2324 of LNCS, pages 200-204. Springer, 2002.
-
(2002)
LNCS
, vol.2324
, pp. 200-204
-
-
Kwiatkowska, M.1
Norman, G.2
Parker, D.3
-
15
-
-
84892642318
-
-
PRISM web page, http://www.cs.bham.ac.uk/~dxp/prism/.
-
PRISM Web Page
-
-
-
16
-
-
0032667392
-
Dynamic Power Management Based on Continuous-Time Markov Decision Processes
-
June
-
Q. Qiu and M. Pedram. Dynamic Power Management Based on Continuous-Time Markov Decision Processes. In Proceedings of Design Automation Conference, pages 555-561, June 1999.
-
(1999)
Proceedings of Design Automation Conference
, pp. 555-561
-
-
Qiu, Q.1
Pedram, M.2
-
18
-
-
0033712192
-
Dynamic power management of complex systems using generalized stochastic petri nets
-
June
-
Q. Qiu and Q. Wu and M. Pedram. Dynamic power management of complex systems using generalized stochastic petri nets. In Proceedings of Design Automation Conference, pages 352-356, June 2000.
-
(2000)
Proceedings of Design Automation Conference
, pp. 352-356
-
-
Qiu, Q.1
Wu, Q.2
Pedram, M.3
-
19
-
-
0036494448
-
An Analysis of System Level Power Management Algorithms and their effects on Latency
-
march
-
D. Ramanathan, S. Irani, and R. Gupta. An Analysis of System Level Power Management Algorithms and their effects on Latency. IEEE Trans. on Computer Aided Design, 21(3), march 2002.
-
(2002)
IEEE Trans. on Computer Aided Design
, vol.21
, Issue.3
-
-
Ramanathan, D.1
Irani, S.2
Gupta, R.3
-
24
-
-
0030104176
-
Predictive Shutdown and Other Architectural Techniques for Energy Efficient Programmable Computation
-
march
-
M. B. Srivastava, A. P. Chandrakasan, and R. W. Broderson. Predictive Shutdown and Other Architectural Techniques for Energy Efficient Programmable Computation. IEEE Trans. on VLSI Systems, 4(1):42-54, march 1996.
-
(1996)
IEEE Trans. on VLSI Systems
, vol.4
, Issue.1
, pp. 42-54
-
-
Srivastava, M.B.1
Chandrakasan, A.P.2
Broderson, R.W.3
|