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Volumn 4296 LNCS, Issue , 2006, Pages 107-117

The smallest ARIA module with 16-bit architecture

Author keywords

ARIA; Cryptography; Low power design

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COMPUTER SIMULATION; INITIAL VALUE PROBLEMS; PUBLIC KEY CRYPTOGRAPHY;

EID: 34547466844     PISSN: 03029743     EISSN: 16113349     Source Type: Conference Proceeding    
DOI: 10.1007/11927587_11     Document Type: Conference Paper
Times cited : (7)

References (13)
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    • J. Park, Y. Yun, Y.-D. Kim, S. Yang, T. Chang and Y. You, Design and implementation of ARIA cryptic algorithm, Journal of IEEK, 42-SD, no. 4, pp. 22-36, Apr. 2004 (in Korean)
    • J. Park, Y. Yun, Y.-D. Kim, S. Yang, T. Chang and Y. You, "Design and implementation of ARIA cryptic algorithm," Journal of IEEK, vol. 42-SD, no. 4, pp. 22-36, Apr. 2004 (in Korean)
  • 7
    • 34547332108 scopus 로고    scopus 로고
    • Low power compact design of ARIA block cipher
    • May
    • J. Park, Y.-D. Kim, S. Yang, and Y. You, "Low power compact design of ARIA block cipher," Proceeding ISCAS2006, pp. 313-316, May. 2006
    • (2006) Proceeding ISCAS2006 , pp. 313-316
    • Park, J.1    Kim, Y.-D.2    Yang, S.3    You, Y.4
  • 8
    • 35048859848 scopus 로고    scopus 로고
    • Strong authentication for RFID systems using the AES algorithm
    • Proceeding CHES2004, Aug
    • M. Feldhofer, S. Dominikus and J. Wolkerstorfer, "Strong authentication for RFID systems using the AES algorithm," Proceeding CHES2004, LNCS 3156, pp 357-370, Aug. 2004
    • (2004) LNCS , vol.3156 , pp. 357-370
    • Feldhofer, M.1    Dominikus, S.2    Wolkerstorfer, J.3
  • 9
    • 34547479335 scopus 로고    scopus 로고
    • Unified hardware architecture for 128-bit block cipher AES and Camellia
    • Proceeding CHES 2003, Sep
    • A. Satoh and S. Morioka, "Unified hardware architecture for 128-bit block cipher AES and Camellia," Proceeding CHES 2003, LNCS 2779, pp 304-318, Sep. 2003
    • (2003) LNCS , vol.2779 , pp. 304-318
    • Satoh, A.1    Morioka, S.2
  • 12
    • 35248894915 scopus 로고    scopus 로고
    • An optimized S-Box circuit architecture for low power AES design
    • Proceeding CHES 2002, Aug
    • S. Morioka and A. Satoh, "An optimized S-Box circuit architecture for low power AES design," Proceeding CHES 2002, LNCS 2523, pp. 172-186, Aug. 2002.
    • (2002) LNCS , vol.2523 , pp. 172-186
    • Morioka, S.1    Satoh, A.2
  • 13
    • 34547454323 scopus 로고    scopus 로고
    • Hardware-focused performance comparison for the standard block cipher AES, Camellia, and Triple-DES
    • Proceeding ISC 2003, Oct
    • A. Satoh and S. Morioka, "Hardware-focused performance comparison for the standard block cipher AES, Camellia, and Triple-DES," Proceeding ISC 2003, LNCS 2851, pp. 252-266, Oct. 2003.
    • (2003) LNCS , vol.2851 , pp. 252-266
    • Satoh, A.1    Morioka, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.