-
1
-
-
0031698077
-
A low-voltage, low quiescent current, low drop-out regulator
-
Jan
-
G. A. Rincon-Mora and P. E. Allen, "A low-voltage, low quiescent current, low drop-out regulator," IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36-44, Jan. 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, Issue.1
, pp. 36-44
-
-
Rincon-Mora, G.A.1
Allen, P.E.2
-
2
-
-
0032099772
-
Optimized frequency-shaping circuit toplogies for LDO's
-
Jun
-
G. A. Rincon-Mora and P. E. Allen, "Optimized frequency-shaping circuit toplogies for LDO's," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 45, no. 6, pp. 703-708, Jun. 1998.
-
(1998)
IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process
, vol.45
, Issue.6
, pp. 703-708
-
-
Rincon-Mora, G.A.1
Allen, P.E.2
-
3
-
-
0033873969
-
Active capacitor multiplier in Miller-compensated circuits
-
Jan
-
G. A. Rincon-Mora, "Active capacitor multiplier in Miller-compensated circuits," IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 26-32, Jan. 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, Issue.1
, pp. 26-32
-
-
Rincon-Mora, G.A.1
-
4
-
-
0141920411
-
A capacitor-free CMOS low-dropout regulator with damping-factor-control-frequency compensation
-
Oct
-
K. N. Leung and P. K. T. Mok, "A capacitor-free CMOS low-dropout regulator with damping-factor-control-frequency compensation," IEEE J. Solid-State Circuits, vol. 38, no. 10, pp. 1691-1702, Oct. 2003.
-
(2003)
IEEE J. Solid-State Circuits
, vol.38
, Issue.10
, pp. 1691-1702
-
-
Leung, K.N.1
Mok, P.K.T.2
-
5
-
-
3042600260
-
A frequency compensation scheme for LDO voltage regulators
-
Jun
-
C. K. Chava and J. Silva-Martinez, "A frequency compensation scheme for LDO voltage regulators," IEEE Tians. Circuits Syst. I, vol. 51, no. 6, pp. 1041-1050, Jun. 2004.
-
(2004)
IEEE Tians. Circuits Syst. I
, vol.51
, Issue.6
, pp. 1041-1050
-
-
Chava, C.K.1
Silva-Martinez, J.2
-
6
-
-
0016333057
-
Relationship between frequency response and settling time of operational amplifier
-
Dec
-
B. Y. Kamath, R. G. Meyer, and P. R. Gray, "Relationship between frequency response and settling time of operational amplifier," IEEE J. Solid-State Circuits, vol. SC-9, pp. 347-352, Dec. 1974.
-
(1974)
IEEE J. Solid-State Circuits
, vol.SC-9
, pp. 347-352
-
-
Kamath, B.Y.1
Meyer, R.G.2
Gray, P.R.3
-
7
-
-
0020088823
-
Analysis of the settling behavior of an operational amplifier
-
Feb
-
C. T. Chuang, "Analysis of the settling behavior of an operational amplifier," IEEE J. Solid-State Circuits, vol. SC-17, pp. 74-80, Feb. 1982.
-
(1982)
IEEE J. Solid-State Circuits
, vol.SC-17
, pp. 74-80
-
-
Chuang, C.T.1
-
8
-
-
0003417349
-
-
4th ed. New York: Wiley
-
P. R. Gray, P. J. Hurst, S. H. Lewis, and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th ed. New York: Wiley, 2001.
-
(2001)
Analysis and Design of Analog Integrated Circuits
-
-
Gray, P.R.1
Hurst, P.J.2
Lewis, S.H.3
Meyer, R.G.4
-
9
-
-
0020906580
-
An improved frequency compensation technique for CMOS operational amplifiers
-
Dec
-
B. K. Ahuja, "An improved frequency compensation technique for CMOS operational amplifiers," IEEE J. Solid-State Circuits, vol. SC-18, no. 6, pp. 629-633, Dec. 1983.
-
(1983)
IEEE J. Solid-State Circuits
, vol.SC-18
, Issue.6
, pp. 629-633
-
-
Ahuja, B.K.1
-
10
-
-
0029308949
-
An unconditionally stable two-stage CMOS amplifier
-
May
-
R. Reay and G. Kovacs, "An unconditionally stable two-stage CMOS amplifier," IEEE J. Solid-State Circuits, vol. 30, no. 5, pp. 591-594, May 1995.
-
(1995)
IEEE J. Solid-State Circuits
, vol.30
, Issue.5
, pp. 591-594
-
-
Reay, R.1
Kovacs, G.2
-
11
-
-
0031101679
-
A compensation strategy for two-stage CMOS opamps based on current buffer
-
Mar
-
G. Palmisano and G. Palumbo, "A compensation strategy for two-stage CMOS opamps based on current buffer," IEEE Trans. Circuits Syst. I, Fundam. Theory Applicat., vol. 44, no. 3, pp. 257-262, Mar. 1997.
-
(1997)
IEEE Trans. Circuits Syst. I, Fundam. Theory Applicat
, vol.44
, Issue.3
, pp. 257-262
-
-
Palmisano, G.1
Palumbo, G.2
-
13
-
-
0021622790
-
Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range
-
Dec
-
D. B. Ribner and M. A. Copeland, "Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range," IEEE J. Solid-State Circuits, vol. SC-19, no. 12, pp. 919-925, Dec. 1984.
-
(1984)
IEEE J. Solid-State Circuits
, vol.SC-19
, Issue.12
, pp. 919-925
-
-
Ribner, D.B.1
Copeland, M.A.2
-
14
-
-
0028742371
-
A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries
-
Dec
-
R. Hogervorst, J. P. Tero, and J. H. Huijsing, "A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries," IEEE J. Solid-State Circuits, vol. 29, no. 12, pp. 1505-1513, Dec. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, Issue.12
, pp. 1505-1513
-
-
Hogervorst, R.1
Tero, J.P.2
Huijsing, J.H.3
-
15
-
-
43549101090
-
Low-voltage analog circuit techniques using bias-current reutilization, self-biasing and signal superposition
-
H. Lee, K. N. Leung, and P. K. T. Mok, "Low-voltage analog circuit techniques using bias-current reutilization, self-biasing and signal superposition," in Proc. IEEE Int. Conf Electron Devices and Solid-State Circuits, 2005, pp. 533-536.
-
(2005)
Proc. IEEE Int. Conf Electron Devices and Solid-State Circuits
, pp. 533-536
-
-
Lee, H.1
Leung, K.N.2
Mok, P.K.T.3
-
16
-
-
34547419990
-
A transient-enhanced 20-μA-quiescent 200 mA-load low-dropout regulator with buffer impedance attenuation
-
M. Al-Shyoukh, R. A. Perez, and H. Lee, "A transient-enhanced 20-μA-quiescent 200 mA-load low-dropout regulator with buffer impedance attenuation," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2006, pp. 615-618.
-
(2006)
Proc. IEEE Custom Integrated Circuits Conf. (CICC)
, pp. 615-618
-
-
Al-Shyoukh, M.1
Perez, R.A.2
Lee, H.3
-
17
-
-
18744371945
-
Area-efficient linear regulator with ultra-fast load regulation
-
Apr
-
P. Hazucha, T. Karnik, B. A. Bloechel, C. Parsons, D. Finan, and S. Borkar, "Area-efficient linear regulator with ultra-fast load regulation," IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 933-940, Apr. 2005.
-
(2005)
IEEE J. Solid-State Circuits
, vol.40
, Issue.4
, pp. 933-940
-
-
Hazucha, P.1
Karnik, T.2
Bloechel, B.A.3
Parsons, C.4
Finan, D.5
Borkar, S.6
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