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Volumn , Issue , 2005, Pages 4397-4400

2 GHz 8-bit CMOS ROM-Less direct digital frequency synthesizer

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; CURRENT MODE LOGIC; CURRENT SOURCES; DIE AREA; DIRECT DIGITAL FREQUENCY SYNTHESIZER; GRADIENT ERRORS; HIGH-SPEED PERFORMANCE; LOGIC CELLS; LOOK UP TABLE; LOW-POWER DISSIPATION; MATRIX; NONLINEAR CURRENT; NONLINEAR DAC; SINE-WAVE; SUPPLY VOLTAGES; SWITCHING SCHEME; TOTAL POWER CONSUMPTION;

EID: 34547330467     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465606     Document Type: Conference Paper
Times cited : (13)

References (8)
  • 1
    • 0034462415 scopus 로고    scopus 로고
    • Mapping ROM phase to sineamplitude in direct digital frequency synthesizers using parabolic approximation
    • Dec
    • A. M. Sodagar and G. R. Lahiji, "Mapping ROM phase to sineamplitude in direct digital frequency synthesizers using parabolic approximation, "IEEE Trans. Circuits Syst. II, vol. 47, pp. 1452-1457, Dec. 2000.
    • (2000) IEEE Trans. Circuits Syst. II , vol.47 , pp. 1452-1457
    • Sodagar, A.M.1    Lahiji, G.R.2
  • 2
    • 0033328758 scopus 로고    scopus 로고
    • Design of Low-Power Frequency Synthesizer Using Nonlinear Digital-to-Analog converter
    • October
    • S. Mortezapour and E. K. F. Lee, "Design of Low-Power Frequency Synthesizer Using Nonlinear Digital-to-Analog converter", IEEE J. Solid-state Circuits, pp. 1350-1359, October 1999.
    • (1999) IEEE J. Solid-state Circuits , pp. 1350-1359
    • Mortezapour, S.1    Lee, E.K.F.2
  • 3
    • 0026140313 scopus 로고
    • A 10-b 70-MS/s CMOS D/A converter
    • Apr
    • Y. Nakamura and T. Miki et al.,"A 10-b 70-MS/s CMOS D/A converter,"IEEE J. Solid-State Circuits, vol. 26, pp. 637-642, Apr. 1991
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 637-642
    • Nakamura, Y.1    Miki, T.2
  • 5
    • 0029236640 scopus 로고
    • MOS current mode logic MCML circuit for low-power GHz processors
    • Jan
    • M.Yamashina and H.Yamada, "MOS current mode logic MCML circuit for low-power GHz processors," NEC Res. Develop., vol. 36, no. 1, pp. 54-63, Jan. 1995.
    • (1995) NEC Res. Develop , vol.36 , Issue.1 , pp. 54-63
    • Yamashina, M.1    Yamada, H.2
  • 6
    • 0001264767 scopus 로고    scopus 로고
    • A 14 bit 100 MSamples Update Rate 42 Random Walk CMOS D/A Converter
    • Feb
    • J. Vandenbussche, G. Van der Plas, A. Van den Bosch et al., "A 14 bit 100 MSamples Update Rate 42 Random Walk CMOS D/A Converter," Proceedings of ISSCC, pp. 146-147, Feb. 1999,
    • (1999) Proceedings of ISSCC , pp. 146-147
    • Vandenbussche, J.1    Van der Plas, G.2    Van den Bosch, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.