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Volumn 78, Issue 1, 2007, Pages 161-197

Improved decomposition of signal transition graphs

Author keywords

Asynchronous circuits; Concurrent systems; Decomposition; Modular implementation; Petri nets; Signal Transition Graphs; State explosion

Indexed keywords

ALGORITHMS; ASYNCHRONOUS SEQUENTIAL LOGIC; CIRCUIT THEORY; STATE ESTIMATION; SIGNAL PROCESSING; SPECIFICATIONS; TIMING CIRCUITS;

EID: 34547308672     PISSN: 01692968     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (24)
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    • André, C: Structural transformations giving B-equivalent PT-nets, Applications and Theory of Petri Nets (Pagnoni, Rozenberg, Eds.), Informatik-Fachber. 66, 14-28. Springer, 1983.
  • 2
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    • CASCADE: A tool kernel supporting a comprehensive design method for asynchronous controllers
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    • Beister, J., Eckstein, G., Wollowski, R.: CASCADE: a tool kernel supporting a comprehensive design method for asynchronous controllers, Applications and Theory of Petri Nets 2000 (M. Nielsen, Ed.), Lect. Notes Comp. Sci. 1825, 445-454. Springer, 2000.
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  • 3
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    • Transformations and decompositions of nets
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    • Berthelot, G.: Transformations and decompositions of nets, PetriNets: Central Models and Their Properties (W. Brauer, et al., Eds.), Lect. Notes Comp. Sci. 254, 359-376. Springer, 1987.
    • (1987) PetriNets: Central Models and Their Properties , pp. 359-376
    • Berthelot, G.1
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    • On the models for designing VLSI asynchronous digital systems
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    • Chu, T.-A.1
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    • Chu, T.-A.: Synthesis of self-timed VLSI circuits from Graph-Theoretic Specifications, IEEE Int. Conf. Computer Design ICCD '87, 1987.
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  • 9
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  • 15
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    • Component Refinement and CSC Solving for STG Decomposition
    • Lect. Notes Comp. Sci. 3441, 348 -363. Springer
    • Schaefer, M., Vogler, W.: Component Refinement and CSC Solving for STG Decomposition, FOSSACS 05, Lect. Notes Comp. Sci. 3441, 348 -363. Springer, 2005.
    • (2005) FOSSACS 05
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  • 16
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    • Schaefer, M., Vogler, W., Wollowski, R., Khomenko, V: Strategies for Optimised STG Decomposition, Accepted for ACSD 06.
    • Schaefer, M., Vogler, W., Wollowski, R., Khomenko, V: Strategies for Optimised STG Decomposition, Accepted for ACSD 06.
  • 17
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    • Segala, R.: Quiescence, fairness, testing, and the notion of implementation, CONCUR 93 (E. Best, Ed.), Lect. Notes Comp. Sci. 715, 324-338. Springer, 1993.
    • Segala, R.: Quiescence, fairness, testing, and the notion of implementation, CONCUR 93 (E. Best, Ed.), Lect. Notes Comp. Sci. 715, 324-338. Springer, 1993.
  • 19
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    • Decomposition in Asynchronous Circuit Design
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    • Vogler, W., Wollowski, R.: Decomposition in Asynchronous Circuit Design, Concurrency and Hardware Design (J. Cortadella, et al., Eds.), Lect. Notes Comp. Sci. 2549, 152 - 190. Springer, 2002.
    • (2002) Concurrency and Hardware Design
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  • 20
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    • Using Petri nets in the design process for interacting asynchronous sequential circuits
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    • Wollowski, R., Beister, J.: Comprehensive Causal Specification of Asynchronous Controller and Arbiter Behaviour, Hardware Design and Petri Nets (A. Yakovlev, L. Gomes, L. Lavagno, Eds.), Kluwer Academic Publishers, 2000.
    • (2000) Hardware Design and Petri Nets
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  • 24
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    • Synthesis of Speed Independent Circuits Based on Decomposition
    • IEEE
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.