Low power LC-VCO design using direct cross-coupled cell biasing

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 4018-4021

  Park, Dongkyu ^a   Jung, Byunghoo ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS CURRENTS; CAPACITANCE; ENERGY UTILIZATION; PHASE NOISE; TOPOLOGY;

BIAS CURRENT MIRRORS; CROSS-COUPLED CELL BIASING; LC-VCO DESIGN; TAIL TRANSISTORS;

VARIABLE FREQUENCY OSCILLATORS;

EID: 34547299883     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Donhee Ham and Ali Hajimiri, "Concepts and Methods in Optimization of Integrated LC VCOs," IEEE J. Solid-State Circuits, vol. 36, pp. 896-909, June 201.
2. John R. Long and Miles A Copeland, "The Modeling, Characterization, and Design of Monolithic Inductors for Silicon RF IC's," IEEE J. Solid-State Circuits, vol. 32, pp. 357-369, Mar. 1997
3. HongMo Wang, "Comments on "Design Issues in CMOS Differential LC Oscillators"," IEEE Transactions on Solid State Circuits, vol. 35, Feb 2000.
4. Ali Harjimiri and Thomas H. Lee, "Design Issues in CMOS Differential LC Oscillators," IEEE J. Solid-State Circuits, vol.34, May 1999.
5. Emad Hegazi, Henrik Sjoland, and Asad A. Abidi, "A Filtering Technique to Lower Oscillator Phase Noise," IEEE J. Solid-State Circuits, vol. 36, Dec 2001.
6. Byunghoo Jung and Ramesh Harjani, "High Frequency LC VCO Design Using Capacitive Degeneration," IEEE J., Solid-State Circuits, vol. 39, pp.2359-2370, Dec 2004.