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Volumn , Issue , 2006, Pages 5315-5318

A 65MHZ switching rate, two-stage interleaved synchronous buck converter with fully integrated output filter

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENT REGULATORS; ELECTRIC FILTERS; INTEGRATING CIRCUITS; SWITCHING SYSTEMS; SYNCHRONOUS MACHINERY;

EID: 34547298717     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (14)

References (8)
  • 1
    • 0035168264 scopus 로고    scopus 로고
    • A 0.18μm SiGe RFBiCMOS technology for wireless and gigabit optical Communication applications
    • D. J. Kirchgessner, et al., "A 0.18μm SiGe RFBiCMOS technology for wireless and gigabit optical Communication applications," in Proc. IEEE BCTM, 2001, pp. 151-154.
    • (2001) Proc. IEEE BCTM , pp. 151-154
    • Kirchgessner, D.J.1
  • 2
    • 0035425125 scopus 로고    scopus 로고
    • I Mitros, et al., High-voltage drain extended MOS transistors for 0.18μ logic CMOS process, IEEE Trans. Electron Devices, 48, pp. 1751-1755, 2001.
    • I Mitros, et al., High-voltage drain extended MOS transistors for 0.18μ logic CMOS process," IEEE Trans. Electron Devices, vol. 48, pp. 1751-1755, 2001.
  • 3
    • 0023964894 scopus 로고
    • Models of lumped elements on GaAs up to 18 GHz
    • E. Pettenpaul et al., "Models of lumped elements on GaAs up to 18 GHz," IEEE Trans. Microwave Theory Tech., vol. 36, pp. 294-304, 1988.
    • (1988) IEEE Trans. Microwave Theory Tech , vol.36 , pp. 294-304
    • Pettenpaul, E.1
  • 4
    • 0042158330 scopus 로고    scopus 로고
    • Inductor design for monolithic DCTDC converters
    • S. Musunuri et al., ''Inductor design for monolithic DCTDC converters," in Proc. IEEE PESC, 2003, pp. 227-232.
    • (2003) Proc. IEEE PESC , pp. 227-232
    • Musunuri, S.1
  • 5
    • 0023999615 scopus 로고
    • Quasi-square-wave converters: Topologies and analysis
    • V. Vorperian, "Quasi-square-wave converters: topologies and analysis," IEEE Trans. Power Electronics, vol. PE-3, no. 2, pp. 183-191, 1988
    • (1988) IEEE Trans. Power Electronics , vol.PE-3 , Issue.2 , pp. 183-191
    • Vorperian, V.1
  • 7
    • 0034313356 scopus 로고
    • Investigation of candidate VRM topologies for future microprocessors
    • X. Zhou et al., "Investigation of candidate VRM topologies for future microprocessors," IEEE Trans. Power Electronics, vol. 15, no. 6, pp. 1172-1182, 1993.
    • (1993) IEEE Trans. Power Electronics , vol.15 , Issue.6 , pp. 1172-1182
    • Zhou, X.1
  • 8
    • 0036076093 scopus 로고    scopus 로고
    • Investigation of candidate topologies for 12V VRM
    • P. Xu et al., "Investigation of candidate topologies for 12V VRM," in Proc. IEEE APEC, 2002, vol. 1, pp. 686-692.
    • (2002) Proc. IEEE APEC , vol.1 , pp. 686-692
    • Xu, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.