FINFET device junction formation challenges

Extended Abstracts of the Sixth International Workshop on Junction Technology, IWJT '06

Volumn , Issue , 2006, Pages 73-77

  Pham, Daniel ^b   Larson, Larry ^a   Yang, Ji Woon ^a  

^a SEMATECH   (United States)

^b FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DOPING (ADDITIVES); DRAIN CURRENT; ELECTRIC CURRENTS; FIELD EFFECT TRANSISTORS; THRESHOLD VOLTAGE;

DOUBLE GATE DEVICES; DRIVE CURRENT; FIN DOPING MEASUREMENT; SOURCE DRAIN JUNCTION;

SEMICONDUCTOR JUNCTIONS;

EID: 34250210756     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iwjt.2006.220864     Document Type: Conference Paper

References (3)

1. W.P. Maszara, "Integration challenges for double-gate MOSFET technologies," Materials Research Society Symposium Proceedings, Vol. 686. 2002.
2. International Technology Roadmap for Semiconductors, SIA/SEMATECH, 2005
3. J. G. Fossum, "Physical Insights on Design and Modeling of Nanoscale FinFETs", IEDM Tech. Dig., (2003) pp.679.