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Volumn , Issue , 2006, Pages 682-690
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Transistor-level optimization of supergates
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Author keywords
[No Author keywords available]
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Indexed keywords
CHIP AREAS;
COMPLEX GATES;
OPTIMUM SOLUTION;
SATISFACTORY SOLUTIONS;
SERIES-PARALLEL;
SIMPLIFIED EXPRESSIONS;
VLSI DESIGN;
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EID: 34247583528
PISSN: 19483287
EISSN: 19483295
Source Type: Conference Proceeding
DOI: 10.1109/ISQED.2006.139 Document Type: Conference Paper |
Times cited : (5)
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References (10)
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