Design challenges of analog-to-digital converters in nanoscale CMOS

IEICE Transactions on Electronics

Volumn E90-C, Issue 4, 2007, Pages 779-785

  Matsuzawa, Akira ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Analog circuits; Analog to digital converter; CMOS; Integrated circuits; Low power operation; Low voltage operation; Technology scaling

Indexed keywords

AMPLIFIERS (ELECTRONIC); ANALOG CIRCUITS; ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; CMOS INTEGRATED CIRCUITS; SIGNAL TO NOISE RATIO;

LOW-POWER OPERATION; LOW-VOLTAGE OPERATION; TECHNOLOGY SCALING;

LOGIC DESIGN;

EID: 34247157358     PISSN: 09168524     EISSN: 17451353     Source Type: Journal    
DOI: 10.1093/ietele/e90-c.4.779     Document Type: Article

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