SPM conscious loop scheduling for embedded chip multiprocessors

Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS

Volumn 1, Issue , 2006, Pages 8-15

  Xue, Liping ^a   Kandemir, Mahmut ^a   Chen, Guangyu ^a   Yemliha, Taylan ^b  

^a The Center for Nanotechnology Education and Utilization   (United States)

^b Syracuse University   (United States)

Author keywords

CMP (chip multiprocessor); Compiler; Data locality; Dynamic loop scheduling; Parallelization; SPM (scratch pad memory)

Indexed keywords

DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; PROGRAM COMPILERS; SCHEDULING;

DATA LOCALITY; DYNAMIC LOOP SCHEDULING; LOOP SCHEDULING; SCRATCH PAD MEMORY (SPM);

MULTIPROCESSING SYSTEMS;

EID: 34047222785     PISSN: 15219097     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPADS.2006.102     Document Type: Conference Paper

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