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Volumn 2, Issue , 2006, Pages

Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys)

Author keywords

[No Author keywords available]

Indexed keywords

COARSE GRAIN RECONFIGURABLE ARCHITECTURE; RENDERING ALGORITHM; SIMD;

EID: 34047153386     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269064     Document Type: Conference Paper
Times cited : (5)

References (15)
  • 1
    • 34047143369 scopus 로고    scopus 로고
    • Catherine Compton (Northwestern University) and Scott Hauck University of Washington, Pages
    • Catherine Compton (Northwestern University) and Scott Hauck (University of Washington), "Reconfigurable Computing: A Survey of Systems and Software". Pages: 1-2.
    • Reconfigurable Computing: A Survey of Systems and Software , pp. 1-2
  • 2
    • 34047135705 scopus 로고    scopus 로고
    • Katholic Universiteit and Vrije Universiteit of Belgium, ADRES: An Architecture with tightly coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. 1-3.
    • Katholic Universiteit and Vrije Universiteit of Belgium, "ADRES: An Architecture with tightly coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix". Págs: 1-3.
  • 3
    • 0031334350 scopus 로고    scopus 로고
    • The Microprocessor is no more General Purpose: Why Future Reconfigurable Platforms will win; invited paper
    • Austin, Texas, USA, October 8-10
    • R. Hartenstein (1997). "The Microprocessor is no more General Purpose: why Future Reconfigurable Platforms will win; invited paper", Proc. International Conference on Innovative Systems in Silicon, ISIS'97, Austin, Texas, USA, October 8-10.
    • (1997) Proc. International Conference on Innovative Systems in Silicon, ISIS'97
    • Hartenstein, R.1
  • 4
    • 0034187952 scopus 로고    scopus 로고
    • Morphosys: An integrated reconfigurable system for data-parallel and computation-intensive applications
    • May
    • H. Singh, M.-H Lee, G. Lu et al. Morphosys: an integrated reconfigurable system for data-parallel and computation-intensive applications. IEEE Trans. on Computers, 49(5):465-481, May 2000.
    • (2000) IEEE Trans. on Computers , vol.49 , Issue.5 , pp. 465-481
    • Singh, H.1    Lee, M.-H.2    Lu, G.3
  • 6
    • 34047105349 scopus 로고    scopus 로고
    • PACTXPP Technologies
    • PACTXPP Technologies, 2003. http://www.pactcorp.com.
    • (2003)
  • 7
    • 0012886693 scopus 로고    scopus 로고
    • REMARC: Reconfigurable Multimedia Array Coprocessor
    • 98, Monterey, Feb, Page
    • T. Miyamori and K. Olukotun: REMARC: Reconfigurable Multimedia Array Coprocessor; Proc. ACM/SIGDA FPGA '98, Monterey, Feb. 1998. Page: 261.
    • (1998) Proc. ACM/SIGDA FPGA , pp. 261
    • Miyamori, T.1    Olukotun, K.2
  • 8
    • 34047141241 scopus 로고    scopus 로고
    • Marcos Sánchez-Élez, Seminario Internacional sobre Sistemas Dinámicamente Reconfigurables (Universidad de Antioquia, Colombia), Arquitecturas Reconfigurables de Grano Grueso.
    • Marcos Sánchez-Élez, Seminario Internacional sobre Sistemas Dinámicamente Reconfigurables (Universidad de Antioquia, Colombia), "Arquitecturas Reconfigurables de Grano Grueso".
  • 10
    • 34047102032 scopus 로고    scopus 로고
    • www.nvidia.com
  • 14
    • 0142061569 scopus 로고    scopus 로고
    • Algorithm Optimizations and Mapping Scheme for Interactive Ray Tracing on a Reconfigurable Architecture
    • Elsevier
    • M. Sanchez-Elez, H. Du, N. Tabrizi, et al. "Algorithm Optimizations and Mapping Scheme for Interactive Ray Tracing on a Reconfigurable Architecture" Computer & Graphics 27 (2003), Elsevier.
    • (2003) Computer & Graphics , vol.27
    • Sanchez-Elez, M.1    Du, H.2    Tabrizi, N.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.