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Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

FPGA architecture characterization for system level performance analysis

(3) Densmore, Douglas a Donlin, Adam b Sangiovanni Vincentelli, Alberto a

a UNIVERSITY OF CALIFORNIA (United States)

b XILINX INC (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INFORMATION RETRIEVAL; SYSTEMS ANALYSIS; TOPOLOGY;

FPGA ARCHITECTURES; METROPOLIS MODELING; PERFORMANCE ANALYSIS;

COMPUTER ARCHITECTURE;

EID: 34047118692 PISSN: 15301591 EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/date.2006.244092 Document Type: Conference Paper

Times cited : (13)

References (9)

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2
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- A. Davare, D. Densmore, V. Shah, and H. Zeng. A Simple Case Study in Metropolis. Technical Memorandum UCB/ERL M04/37, Univerity of California, Berkeley, CA 94720, September 2004.
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- Densmore, D.¹

4
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- February
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- (2004) Design Automation and Teat Europe (DATE)
- Densmore, D.¹ Rekhi, S.² Sangiovanni-Vincentelli, A.³

5
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- Transaction Level Modeling: Flows and Use Models
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