A bit-width optimization methodology for polynomial-based function evaluation

IEEE Transactions on Computers

Volumn 56, Issue 4, 2007, Pages 567-571

  Lee, Dong U ^a   Villasenor, John D ^a  

^a University of California   (United States)

Author keywords

Computer arithmetic; Elementary function approximation; Field programmable gate arrays; Finite wordlength effects; Minimax approximation and algorithms

Indexed keywords

ALGORITHMS; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); OPTIMIZATION; POLYNOMIAL APPROXIMATION;

BIT-WIDTH OPTIMIZATION; FINITE WORDLENGTH EFFECTS; HARDWARE FUNCTION EVALUATION;

COMPUTER HARDWARE;

EID: 34047094903     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2007.1013     Document Type: Article

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