MIMO equalization and cancellation for 10GBASE-T

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 4, Issue , 2006, Pages

  Chen, Jie ^a   Gu, Yongru ^a   Parhi, Keshab K ^a  

^a University of Minnesota   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MULTI INPUT MULTI OUTPUT (MIMO); SIGNAL RECOVERY; TWISTED-PAIR CHANNEL;

COMMUNICATION CHANNELS (INFORMATION THEORY); DECISION FEEDBACK EQUALIZERS; EQUALIZERS; INTERSYMBOL INTERFERENCE; RADIO TRANSMITTERS; SIGNAL TO NOISE RATIO;

BROADBAND NETWORKS;

EID: 33947684761     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. IEEE 802.3an 10GBASE-T Study Group (http://www.ieee802.org/3/an/ public/material/index.html)
2. B. Booth, 10GBASE-T Why now? (http://grouper.ieee.org/groups/ 802/3/10GBT/public/nov02/index.html).
3. IEEE 803.2ab Standard, Physical layer parameters and specifications 1000 Mb/s operation over 4-Pair of category 5 balanced copper cabling, type 1000B ASE-T, 1999.
4. M. Hatamian, O. E. Agazzi, and M. Colombatto, "Design considerations for Gigabit Ethernet 1000Base-T twisted pair transceivers," Proc. IEEE Custom Integrated Circuits Conference, pp. 335-342, 1998.
5. Y. Gu and K. K. Parhi, "Interleaved Trellis Coded Modulation and decoding for 10 Gigabit Ethernet Over Copper," in Proc. of 2004 IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, (ICASSP), vol. 5, pp.25-28, May 2004.
6. K. Azadet and E. Haratsch, "DSP implementation issues in 1000BASE-T Gigabit Ethernet," in Proc Int. Symp. on VLSI Technology, Systems, and Applications, pp. 109-112, 2001.
7. E. F. Haratsch and K. Azadet, "A 1-Gb/s Joint Equalizer and Trellis Decoder for 1000B ASE-T Gigabit Ethernet," IEEE Journal of Solid-State Circuits, vol. 36, no. 3, pp. 374-384.
8. Y. Gu and K. K. Parhi, "Pipelining Tomlinson-Harashima Precoders", in Proc. of 2005 IEEE International Symposium on Circuits and Systems, pp 408-411, Kobe, Japan, May 2005.
9. Naofal Al-Dhahir and Ali H. Sayed, "The finite-length mulit-input multi-output MMSE-DFE," IEEE Trans. Signal Processing, vol.48, pp.2921-2936, Oct.2000.
10. K.K. Parhi, VLSI Digital Signal Processing System Design and Implementation, John Wiley & Son, Inc., New York, 1999.