FPGA-based hardware architecture for neural networks: Binary radix vs. stochastic

Proceedings - 16th Symposium on Integrated Circuits and Systems Design, SBCCI 2003

Volumn , Issue , 2003, Pages 111-116

  Nedjah, N ^a   Mourelle, L D M ^a  

^a STATE UNIVERSITY OF RIO DE JANEIRO   (Brazil)

Author keywords

Neural network hardware; Neural networks; Stochastic processes; Stochastic systems

Indexed keywords

BINS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTEGRATED CIRCUITS; NETWORK ARCHITECTURE; NEURAL NETWORKS; RANDOM PROCESSES; SYSTEMS ANALYSIS;

BINARY INPUTS; FEED FORWARD; FPGA PROTOTYPES; HARDWARE ARCHITECTURE; HARDWARE IMPLEMENTATIONS; NEURAL NETWORK HARDWARE; STOCHASTIC REPRESENTATIONS;

STOCHASTIC SYSTEMS;

EID: 33947141179     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2003.1232815     Document Type: Conference Paper

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