Built-in Self Testing (BIST) of RF performance in a System-on-Chip (SoC)

Proceedings of the 2005 IEEE Dallas/CAS Workshop: Architecture, Circuits and Implementation of SoCs, DCAS '05

Volumn 2005, Issue , 2005, Pages 215-218

  Bashir, Imran ^a   Staszewski, Robert Bogdan ^a   Eliezer, Oren ^a   De Obaldia, Elida ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BLUETOOTH; CHIP SCALE PACKAGES; FLASH MEMORY; INTEGRATED CIRCUIT TESTING; PROGRAM DEBUGGING; REGULATORY COMPLIANCE;

COMPLIANCE TESTING; DEBUG ANALYSIS; LOG PERFORMANCE; PERFORMANCE PARAMETERS; SYSTEM-ON-CHIP (SOC);

BUILT-IN SELF TEST;

EID: 33847757167     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. R. B. Staszewski, K. Muhammad, D. Leipold, C.-M. Hung, Y.-C. Ho, J. L. Wallberg, C. Fernando, K. Maggio, R. Staszewski, T. Jung, J. Koh. S. John, I. Y. Deng, V. Sarda, O. Moreira-Tamayo, V. Mayega, R. Katz, O. Friedman, O. E. Eliezer, E. de-Obaldia, and P. T. Balsara, "All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS," IEEE Journal of Solid-State Circuits, vol. 39, iss. 12, pp. 2278-2291, Dec. 2004.
2. R. B. Staszewski, D. Leipold and P. T. Balsara, "Just-in-time gain estimation of an RF digitally-controlled oscillator for digital direct frequency modulation" IEEE Trans. on Circuits and Systems II, vol. 50, no. 11, pp. 887-892, Nov. 2003
3. R. B. Staszewski, J. Wallberg, S. Rezeq, C.-M. Hung, O. Eliezer, S. Vemulapalli, C. Fernando, K. Maggio, R. Staszewski, N. Barton, M.C. Lee, P. Cruise, M. Entezari, K. Muhammad, and D. Leipold, "All-digital PLL and GSM/EDGE transmitter in 90nm CMOS." Proc. of IEEE Solid-State Circuits Conf., sec. 17.5. pp. 316-317, 600, Feb. 2005, San Francisco, CA.