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Volumn 2005, Issue , 2005, Pages 149-152
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An integrated methodology for accurate extraction of S/D series resistance components in nanoscale MOSFETs
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Author keywords
[No Author keywords available]
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Indexed keywords
PARASITIC LIMITATION;
SOI MOSFET CHARACTERIZATION;
SOURCE/DRAIN (S/D) SERIES RESISTANCE COMPONENTS;
CMOS INTEGRATED CIRCUITS;
DOPING (ADDITIVES);
DRAIN CURRENT;
MOSFET DEVICES;
SILICON ON INSULATOR TECHNOLOGY;
CONTACT RESISTANCE;
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EID: 33847742574
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (39)
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References (5)
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