Gate circuit layout optimization of Power Module regarding transient current imbalance

PESC Record - IEEE Annual Power Electronics Specialists Conference

Volumn 2005, Issue , 2005, Pages 541-546

  Martin, C ^a   Guichon, J M ^a   Schanen, J L ^a   Pasterczyk, R ^b  

^a LABORATOIRE D ELECTROTECHNIQUE DE GRENOBLE   (France)

^b MGE UPS Systems   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENT CONTROL; GATES (TRANSISTOR); INDUCTANCE; MICROPROCESSOR CHIPS; OPTIMIZATION;

DYNAMIC CURRENT REPARTITION; POWER CIRCUITS; TRANSIENT CURRENT IMBALANCE;

ELECTRIC POWER SYSTEMS;

EID: 33847707292     PISSN: 02759306     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PESC.2005.1581678     Document Type: Conference Paper

References (9)

1. R.Pasterczyk, Martin Schanen, "Comparative study of new emerged packages for high power IOBT modules", Power Conversion Intelligent Motion, 25-27 May 2004, Nuremberg.
2. M.Akhbari, N.Piette, JL.Schanen, "Optimization of IOBT gate circuit layout to supress power drive interaction in power modules", IEEE LAS'98 St Louis, Missouri, Oct.12-16 1998
3. th European Conference on Power Electronics and Applications, 2-4 September 2003, Toulouse.
4. th Annual meeting, 12-16 October 2004, Salt Lake City.
5. Z.Liang, JD.Van Wyk, FC.Lee, D.Boroyavich, EP.Scott, Z.Chen, Y.Pang, "Integrated packaging of a IkW switching module using a novel planar integration technology", IEEE transactions on power electronics, Vol 19, No 1, January 2004
6. A.R,Jr.Hefher, D.Diebolt, "An experimentally verified IOBT model implemented in the Saber circuit simulator", IEEE Transactions on Power Electronics, Volume: 9 Issue: 5 , Sept. 1994 Page(s): 532-542
7. H.Morel, S.H.Gamal, J.P.Chante, "State variable modeling of the power pin diode using an explicit approximation of semiconductor device equations: a novel approach" IEEE Transactions on Power Electronics, Volume: 9 Issue: 1, Jan. 1994 Page(s): 112-120
8. JZ.Chen, YF.Pang, D.Boroyevich, EP.Scott, KA.Thole, "Electrical and thermal layout design considerations for integrated power electronics modules", Industry Applications Conference, 2002. 37th IAS Annual Meeting. Conference Record of the Volume 1, 13-18 Oct. 2002 Page(s):242-246 vol.1
9. Harwell, Subroutine Library Specifications, Tome 3, VF13