Program and SILC constraints on NC memories scaling: A Monte Carlo approach

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 1038-1041

  Gusmeroli, R ^a   Spinelli, A S ^a   Compagnoni, C Monzio ^a   Ielmini, D ^a   Morelli, F ^a   Lacaita, A L ^a,b  

^a POLITECNICO DI MILANO   (Italy)

^b IFN CNR   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINED OPTIMIZATION; DIGITAL STORAGE; LOGIC GATES; MONTE CARLO METHODS; NANOTECHNOLOGY; RELIABILITY; SILICON ON INSULATOR TECHNOLOGY;

ITRS NODE REQUIREMENTS; NANOCRYSTAL MEMORIES; SCALING CONSTRAINTS; SILC IMMUNITY;

NANOCRYSTALS;

EID: 33847694270     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

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3. B. De Salvo et al., "How far will silicon nanocrystals push the scaling limits of NVMs technologies?", IEDM Tech. Dig., 597-600 (2003).
4. D. Ielmini, A. S. Spinelli, and A. L. Lacaita, "Recent developments on Flash memory reliability," Microelectron. Eng. 80C, 321-328 (2005).
5. L. Perniola et al., "Modeling of the programming window distribution in multinanocrystals memories," IEEE Trans. Nanotech. 2, 277-284, (2003).
6. C. Monzio Compagnoni et al., "Study of data retention for nanocrystal Flash memories," Proc. IRPS, 506-512 (2003).