Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2006, Pages 2001-2004

  Galhardo, A ^a,b   Goes, J ^a   Paulino, N ^a  

^a UNINOVA   (Portugal)

^b DEEA   (Portugal)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC DISTORTION; ELECTRIC POTENTIAL; LINEARIZATION; NYQUIST DIAGRAMS; OPTICAL SWITCHES; RELIABILITY THEORY;

CLOCK-BOOSTING TECHNIQUES; GATE VOLTAGES; NYQUIST BANDS; SAMPLE-AND-HOLD CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 33847618539     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Randal Geiger, Philip Allen, Noel Strader, "VLSI Design Techniques for Analog and Digital Circuits", McGraw-Hill Int. Editions, pp. 301-302, 1990.
2. Terje Andersen et. Al., "A Cost-Efficient High-Speed 12-bit Pipeline ADC in 0.18um Digital CMOS", IEEE Journal of Solid-State Circuits, Vol. 40, no. 7, July 2005.
3. Chung-Yueh Yang and Chung-Chih Hung, "A Low-Voltage Low-Distortion MOS Sampling Switch", IEEE International Symposium on Circuits and Systems, pp. 3131-3134, May 2005.
4. A. Abo, "Design for Reliability of Low-voltage, Switched-capacitor Circuits", Phd. Thesis, Berkeley, pp. 53-62, 1999.
5. Jesper Steensgaard, "Bootstrapped Low-Voltage, Analog Switches", IEEE International Symposium on Circuits and Systems, pp. II-29-32, May 1999.